Gurindar S. Sohi

Publication Activity (10 Years)

Years Active: 1985-2024
Publications (10 Years): 5

Top Venues

PLDI

ICS 25th Anniversary

MICRO

CoRR

Publications

Shyam Murthy, Gurindar S. Sohi
Instruction Block Movement with Coupled High-Level Program Sequencing. CoRR (2024)
Vanshika Baoni, Adarsh Mittal, Gurindar S. Sohi
Fat Loads: Exploiting Locality Amongst Contemporaneous Load Operations to Optimize Cache Accesses. MICRO (2021)
Hongil Yoon, Jason Lowe-Power, Gurindar S. Sohi
Filtering Translation Bandwidth with Virtual Caching. ASPLOS (2018)
Iulian Brumar, Marc Casas, Miquel Moretó, Mateo Valero, Gurindar S. Sohi
ATM: Approximate Task Memoization in the Runtime System. IPDPS (2017)
Hongil Yoon, Gurindar S. Sohi
Revisiting virtual L1 caches: A practical design using dynamic synonym remapping. HPCA (2016)
Jichuan Chang, Gurindar S. Sohi
Author retrospective for cooperative cache partitioning for chip multiprocessors. ICS 25th Anniversary (2014)
Srinath Sridharan, Gagan Gupta, Gurindar S. Sohi
Adaptive, efficient, parallel execution of parallel programs. PLDI (2014)
Gagan Gupta, Srinath Sridharan, Gurindar S. Sohi
Globally precise-restartable execution of parallel programs. PLDI (2014)
Srinath Sridharan, Gagan Gupta, Gurindar S. Sohi
Holistic run-time parallelism management for time and energy efficiency. ICS (2013)
Gagan Gupta, Srinath Sridharan, Gurindar S. Sohi
Efficient, precise-restartable program execution on future multicores. Hot Chips Symposium (2012)
Koushik Chakraborty, Philip M. Wells, Gurindar S. Sohi
Supporting Overcommitted Virtual Machines through Hardware Spin Detection. IEEE Trans. Parallel Distributed Syst. 23 (2) (2012)
Gagan Gupta, Gurindar S. Sohi
Dataflow execution of sequential imperative programs on multicore architectures. MICRO (2011)
Philip M. Wells, Koushik Chakraborty, Gurindar S. Sohi
Mixed-mode multicore reliability. ASPLOS (2009)
Philip M. Wells, Koushik Chakraborty, Gurindar S. Sohi
Dynamic heterogeneity and the need for multicore virtualization. ACM SIGOPS Oper. Syst. Rev. 43 (2) (2009)
Matthew D. Allen, Srinath Sridharan, Gurindar S. Sohi
Serialization sets: a dynamic dependence-based parallel execution model. PPOPP (2009)
Philip M. Wells, Koushik Chakraborty, Gurindar S. Sohi
Adapting to intermittent faults in multicore systems. ASPLOS (2008)
Philip M. Wells, Gurindar S. Sohi
Serializing instructions in system-intensive workloads: Amdahl's Law strikes again. HPCA (2008)
Philip M. Wells, Koushik Chakraborty, Gurindar S. Sohi
Adapting to Intermittent Faults in Future Multicore Systems. PACT (2007)
Jichuan Chang, Gurindar S. Sohi
Cooperative cache partitioning for chip multiprocessors. ICS (2007)
Saisanthosh Balakrishnan, Gurindar S. Sohi
Program Demultiplexing: Data-flow based Speculative Parallelization of Methods in Sequential Programs. ISCA (2006)
Koushik Chakraborty, Philip M. Wells, Gurindar S. Sohi
Computation spreading: employing hardware migration to specialize CMP cores on-the-fly. ASPLOS (2006)
Jichuan Chang, Gurindar S. Sohi
Cooperative Caching for Chip Multiprocessors. ISCA (2006)
Philip M. Wells, Koushik Chakraborty, Gurindar S. Sohi
Hardware support for spin management in overcommitted virtual machines. PACT (2006)
Jaehyuk Huh, Jichuan Chang, Doug Burger, Gurindar S. Sohi
Coherence decoupling: making use of incoherence. ASPLOS (2004)
Gurindar S. Sohi
Single-Chip Multiprocessors: The Next Wave of Computer Architecture Innovation. MICRO (2004)
J. Adam Butts, Gurindar S. Sohi
Use-Based Register Caching with Decoupled Indexing. ISCA (2004)
Jaehyuk Huh, Doug Burger, Jichuan Chang, Gurindar S. Sohi
Speculative Incoherent Cache Protocols. IEEE Micro 24 (6) (2004)
Allison L. Holloway, Gurindar S. Sohi
Characterization of Problem Stores. IEEE Comput. Archit. Lett. 3 (2004)
Paramjit S. Oberoi, Gurindar S. Sohi
Parallelism in the Front-End. ISCA (2003)
Saisanthosh Balakrishnan, Gurindar S. Sohi
Exploiting Value Locality in Physical Register Files. MICRO (2003)
J. Adam Butts, Gurindar S. Sohi
Dynamic dead-instruction detection and elimination. ASPLOS (2002)
Craig B. Zilles, Gurindar S. Sohi
Master/slave speculative parallelization. MICRO (2002)
Amir Roth, Gurindar S. Sohi
A quantitative framework for automated pre-execution thread selection. MICRO (2002)
J. Adam Butts, Gurindar S. Sohi
Characterizing and predicting value degree of use. MICRO (2002)
Andreas Moshovos, Gurindar S. Sohi
Reducing Memory Latency via Read-after-Read Memory Dependence Prediction. IEEE Trans. Computers 51 (3) (2002)
Paramjit S. Oberoi, Gurindar S. Sohi
Out-of-Order Instruction Fetch Using Multiple Sequencers. ICPP (2002)
Amir Roth, Gurindar S. Sohi
Squash Reuse via a Simplified Implementation of Register Integration. J. Instr. Level Parallelism 3 (2001)
Amir Roth, Gurindar S. Sohi
Speculative Data-Driven Multithreading. HPCA (2001)
Gurindar S. Sohi
Microprocessors - 10 Years Back, 10 Years Ahead. Informatics (2001)
T. N. Vijaykumar, Sridhar Gopal, James E. Smith, Gurindar S. Sohi
Speculative Versioning Cache. IEEE Trans. Parallel Distributed Syst. 12 (12) (2001)
Andreas Moshovos, Gurindar S. Sohi
Microarchitectural innovations: boosting microprocessor performance beyond semiconductor technology scaling. Proc. IEEE 89 (11) (2001)
Gurindar S. Sohi, Amir Roth
Speculative Multithreaded Processors. Computer 34 (4) (2001)
Craig B. Zilles, Gurindar S. Sohi
A Programmable Co-Processor for Profiling. HPCA (2001)
Craig B. Zilles, Gurindar S. Sohi
Execution-based prediction using speculative slices. ISCA (2001)
J. Adam Butts, Gurindar S. Sohi
A static power model for architects. MICRO (2000)
Andreas Moshovos, Gurindar S. Sohi
Memory Dependence Speculation Tradeoffs in Centralized, Continuous-Window Superscalar Processors. HPCA (2000)
Gurindar S. Sohi
Amir Roth: Speculative Multithreaded Processors. HiPC (2000)
Andreas Moshovos, Gurindar S. Sohi
Memory Dependence Prediction in Multimedia Applications. J. Instr. Level Parallelism 2 (2000)
Amir Roth, Gurindar S. Sohi
Register integration: a simple and efficient implementation of squash reuse. MICRO (2000)
Craig B. Zilles, Gurindar S. Sohi
Understanding the backward slices of performance degrading instructions. ISCA (2000)
Amir Roth, Andreas Moshovos, Gurindar S. Sohi
Improving virtual function call target prediction via dependence-based pre-computation. International Conference on Supercomputing (1999)
Craig B. Zilles, Joel S. Emer, Gurindar S. Sohi
The Use of Multithreading for Exception Handling. MICRO (1999)
Amir Roth, Gurindar S. Sohi
Effective Jump-Pointer Prefetching for Linked Data Structures. ISCA (1999)
Andreas Moshovos, Gurindar S. Sohi
Read-After-Read Memory Dependence Prediction. MICRO (1999)
T. N. Vijaykumar, Gurindar S. Sohi
Task Selection for the Multiscalar Architecture. J. Parallel Distributed Comput. 58 (2) (1999)
Andreas Moshovos, Gurindar S. Sohi
Speculative Memory Cloaking and Bypassing. Int. J. Parallel Program. 27 (6) (1999)
T. N. Vijaykumar, Gurindar S. Sohi
Task Selection for a Multiscalar Processor. MICRO (1998)
Avinash Sodani, Gurindar S. Sohi
Understanding the Differences Between Value Prediction and Instruction Reuse. MICRO (1998)
Gurindar S. Sohi
Retrospective: Instruction Issue Logic for High-Performance, Interruptable Pipelined Processors. 25 Years ISCA: Retrospectives and Reprints (1998)
Amir Roth, Andreas Moshovos, Gurindar S. Sohi
Dependance Based Prefetching for Linked Data Structures. ASPLOS (1998)
Gurindar S. Sohi, Sriram Vajapeyam
Instruction Issue Logic for High-Performance, Interruptable Pipelined Processors. 25 Years ISCA: Retrospectives and Reprints (1998)
Sridhar Gopal, T. N. Vijaykumar, James E. Smith, Gurindar S. Sohi
Speculative Versioning Cache. HPCA (1998)
Avinash Sodani, Gurindar S. Sohi
An Empirical Analysis of Instruction Repetition. ASPLOS (1998)
Gurindar S. Sohi, Scott E. Breach, T. N. Vijaykumar
Multiscalar Processors. 25 Years ISCA: Retrospectives and Reprints (1998)
Gurindar S. Sohi
Retrospective: Multiscalar Processors. 25 Years ISCA: Retrospectives and Reprints (1998)
Andreas Moshovos, Scott E. Breach, T. N. Vijaykumar, Gurindar S. Sohi
Dynamic Speculation and Synchronization of Data Dependences. ISCA (1997)
Avinash Sodani, Gurindar S. Sohi
Dynamic Instruction Reuse. ISCA (1997)
Andreas Moshovos, Gurindar S. Sohi
Streamlining Inter-Operation Memory Communication via Data Dependence Prediction. MICRO (1997)
Manoj Franklin, Gurindar S. Sohi
ARB: A Hardware Mechanism for Dynamic Reordering of Memory References. IEEE Trans. Computers 45 (5) (1996)
Todd M. Austin, Gurindar S. Sohi
High-Bandwidth Address Translation for Multiple-Issue Processors. ISCA (1996)
Gurindar S. Sohi, Scott E. Breach, T. N. Vijaykumar
Multiscalar Processors. ISCA (1995)
Todd M. Austin, Dionisios N. Pnevmatikatos, Gurindar S. Sohi
Streamlining Data Cache Access with Fast Address Calculation. ISCA (1995)
James E. Smith, Gurindar S. Sohi
The microarchitecture of superscalar processors. Proc. IEEE 83 (12) (1995)
Todd M. Austin, Gurindar S. Sohi
Zero-cycle loads: microarchitecture support for reducing load latency. MICRO (1995)
Alvin R. Lebeck, Gurindar S. Sohi
Request Combining in Multiprocessors with Arbitrary Interconnection Networks. IEEE Trans. Parallel Distributed Syst. 5 (11) (1994)
Todd M. Austin, Scott E. Breach, Gurindar S. Sohi
Efficient Detection of All Pointer and Array Access Errors. PLDI (1994)
Scott E. Breach, T. N. Vijaykumar, Gurindar S. Sohi
The anatomy of the register file in a multiscalar processor. MICRO (1994)
Dionisios N. Pnevmatikatos, Gurindar S. Sohi
Guarded Executing and Branch Prediction in Dynamic ILP Processors. ISCA (1994)
Dionisios N. Pnevmatikatos, Manoj Franklin, Gurindar S. Sohi
Control flow prediction for dynamic ILP processors. MICRO (1993)
Gurindar S. Sohi
High-Bandwidth Interleaved Memories for Vector Processors-A Simulation Study. IEEE Trans. Computers 42 (1) (1993)
Manoj Franklin, Gurindar S. Sohi
The Expandable Split Window Paradigm for Exploiting Fine-Grain Parallelism. ISCA (1992)
MenChow Chiang, Gurindar S. Sohi
Evaluating Design Choices for Shared Bus Multiprocessors in a Throughput-Oriented Environment. IEEE Trans. Computers 41 (3) (1992)
Manoj Franklin, Gurindar S. Sohi
Register traffic analysis for streamlining inter-operation communication in fine-grain parallel processors. MICRO (1992)
Todd M. Austin, Gurindar S. Sohi
Dynamic Dependency Analysis of Ordinary Programs. ISCA (1992)
Gurindar S. Sohi, Manoj Franklin
High-Bandwidth Data Memory Systems for Superscalar Processors. ASPLOS (1991)
Sriram Vajapeyam, Gurindar S. Sohi, Wei-Chung Hsu
An Empirical Study of the CRAY Y-MP Processor Using the Perfect Club Benchmarks. ISCA (1991)
MenChow Chiang, Gurindar S. Sohi
Experience with Mean Value Analysis Models for Evaluating Shared Bus, Throughput-Oriented Multiprocessors. SIGMETRICS (1991)
Kifung C. Cheung, Gurindar S. Sohi, Kewal K. Saluja, Dhiraj K. Pradhan
Design and Analysis of a Gracefully Degrading Interleaved Memory System. IEEE Trans. Computers 39 (1) (1990)
Gurindar S. Sohi
Instruction Issue Logic for High-Performance Interruptible, Multiple Functional Unit, Pipelines Computers. IEEE Trans. Computers 39 (3) (1990)
Shreekant S. Thakkar, Michel Dubois, Anthony T. Laundrie, Gurindar S. Sohi, David V. James, Stein Gjessing, Manu Thapar, Bruce Delagi, Michael J. Carlton, Alvin M. Despain
Scalable Shared-Memory Multiprocessor Architectures. Computer 23 (6) (1990)
Gurindar S. Sohi, Wei-Chung Hsu
The use of intermediate memories for low-latency memory access in supercomputer scalar units. J. Supercomput. 4 (1) (1990)
Sriram Vajapeyam, Gurindar S. Sohi, Wei-Chung Hsu
Exploitation of operation-level parallelism in a processor of the CRAY X-MP. ICCD (1990)
Steven L. Scott, Gurindar S. Sohi
The Use of Feedback in Multiprocessors and Its Application to Tree Saturation Control. IEEE Trans. Parallel Distributed Syst. 1 (4) (1990)
Gurindar S. Sohi
Cache Memory Organization to Enhance the Yield of High-Performance VLSI Processors. IEEE Trans. Computers 38 (4) (1989)
Gurindar S. Sohi, Sriram Vajapeyam
Tradeoffs in Instruction Format Design for Horizontal Architectures. ASPLOS (1989)
Mary K. Vernon, Rajeev Jog, Gurindar S. Sohi
Performance Analysis of Hierarchical Cache-Consistent Multiprocessors. Perform. Evaluation 9 (4) (1989)
Gurindar S. Sohi, James E. Smith, James R. Goodman
Restricted Fetch&Phi operations for parallel processing. ICS (1989)
Steven L. Scott, Gurindar S. Sohi
Using Feedback to Control Tree Saturation in Multistage Interconnection Networks. ISCA (1989)
V. S. Madan, C.-J. Peng, Gurindar S. Sohi
On the Adequacy of Direct Mapped Caches for Lisp and Prolog Data Reference Patterns. NACLP (1989)
Gurindar S. Sohi, Manoj Franklin, Kewal K. Saluja
A study of time-redundant fault tolerance techniques for high-performance pipelined computers. FTCS (1989)

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Publication Activity (10 Years)

Top Topics

Top Venues

Gurindar S. Sohi