Marc Casas

ORCID

Publication Activity (10 Years)

Years Active: 2007-2024
Publications (10 Years): 91

Top Venues

CoRR

ICS

IPDPS

Publications

Alexandre Valentin Jamet, Georgios Vavouliotis, Daniel A. Jiménez, Lluc Alvarez, Marc Casas
A Two Level Neural Approach Combining Off-Chip Prediction with Adaptive Prefetch Filtering. CoRR (2024)
Alexandre Valentin Jamet, Georgios Vavouliotis, Daniel A. Jiménez, Lluc Alvarez, Marc Casas
Practically Tackling Memory Bottlenecks of Graph-Processing Workloads. IPDPS (2024)
Francesc Martínez Palau, Martí Torrents, Adrià Armejach, Marc Casas
Exploiting Vector Code Semantics for Efficient Data Cache Prefetching. ICS (2024)
Louis Ledoux, Marc Casas
An Open-Source Framework for Efficient Numerically-Tailored Computations. CoRR (2024)
Alexandre Valentin Jamet, Georgios Vavouliotis, Daniel A. Jiménez, Lluc Alvarez, Marc Casas
A Two Level Neural Approach Combining Off-Chip Prediction with Adaptive Prefetch Filtering. HPCA (2024)
Louis Ledoux, Marc Casas
Open-Source GEMM Hardware Kernels Generator: Toward Numerically-Tailored Computations. CoRR (2023)
Valentin Le Fèvre, Marc Casas
Efficient Execution of SpGEMM on Long Vector Architectures. HPDC (2023)
Louis Ledoux, Marc Casas
An Open-Source Framework for Efficient Numerically-Tailored Computations. FPL (2023)
Federico Rossi, Marco Cococcioni, Roger Ferrer Ibáñez, Jesús Labarta, Filippo Mantovani, Marc Casas, Emanuele Ruffaldi, Sergio Saponara
Compressed Real Numbers for AI: a case-study using a RISC-V CPU. CoRR (2023)
Alexandre de Limas Santana, Adrià Armejach, Marc Casas
Efficient Direct Convolution Using Long SIMD Instructions. PPoPP (2023)
Valentin Le Fèvre, Marc Casas
Optimization of SpGEMM with Risc-V vector instructions. CoRR (2023)
Alexandre Valentin Jamet, Lluc Alvarez, Marc Casas
Characterizing the impact of last-level cache replacement policies on big-data workloads. CoRR (2023)
Constantino Gómez, Filippo Mantovani, Erich Focht, Marc Casas
HPCG on long-vector architectures: Evaluation and optimization on NEC SX-Aurora and RISC-V. Future Gener. Comput. Syst. 143 (2023)
John Osorio Ríos, Adrià Armejach, Eric Petit, Greg Henry, Marc Casas
A BF16 FMA is All You Need for DNN Training. ARITH (2022)
John Osorio Ríos, Adrià Armejach, Eric Petit, Greg Henry, Marc Casas
FASE: A Fast, Accurate and Seamless Emulator for Custom Numerical Formats. ISPASS (2022)
Sergi Laut, Marc Casas, Ricard Borrell
Communication-aware Sparse Patterns for the Factorized Approximate Inverse Preconditioner. HPDC (2022)
Juan M. Cebrian, Thibaud Balem, Adrián Barredo, Marc Casas, Miquel Moretó, Alberto Ros, Alexandra Jimborean
Compiler-Assisted Compaction/Restoration of SIMD Instructions. IEEE Trans. Parallel Distributed Syst. 33 (4) (2022)
Louis Ledoux, Marc Casas
A Generator of Numerically-Tailored and High-Throughput Accelerators for Batched GEMMs. FCCM (2022)
Georgios Vavouliotis, Gino Chacon, Lluc Alvarez, Paul V. Gratz, Daniel A. Jiménez, Marc Casas
Page Size Aware Cache Prefetching. MICRO (2022)
Robin Kumar Sharma, Marc Casas
Task-based Acceleration of Bidirectional Recurrent Neural Networks on Multi-core Architectures. IPDPS (2022)
John Osorio Ríos, Adrià Armejach, Eric Petit, Greg Henry, Marc Casas
FASE: A Fast, Accurate and Seamless Emulator for Custom Numerical Formats. ECML/PKDD (5) (2022)
John Osorio Ríos, Adrià Armejach, Eric Petit, Greg Henry, Marc Casas
A BF16 FMA is All You Need for DNN Training. IEEE Trans. Emerg. Top. Comput. 10 (3) (2022)
Valentin Le Fèvre, Tetsuzo Usui, Marc Casas
A Selective Nesting Approach for the Sparse Multi-threaded Cholesky Factorization. ESPM2@SC (2022)
Paul Caheny, Lluc Alvarez, Marc Casas, Miquel Moretó
TD-NUCA: Runtime Driven Management of NUCA Caches in Task Dataflow Programming Models. SC (2022)
Valentin Le Fèvre, Tetsuzo Usui, Marc Casas
Optimization of the Sparse Multi-Threaded Cholesky Factorization for A64FX. CoRR (2022)
Sergi Laut, Ricard Borrell, Marc Casas
Cache-aware Sparse Patterns for the Factorized Sparse Approximate Inverse Preconditioner. HPDC (2021)
Georgios Vavouliotis, Lluc Alvarez, Boris Grot, Daniel A. Jiménez, Marc Casas
Morrigan: A Composite Instruction TLB Prefetcher. MICRO (2021)
Lilia Zaourar, Mohamed Benazouz, Ayoub Mouhagir, Fatma Jebali, Tanguy Sassolas, Jean-Christophe Weill, Carlos Falquez, Nam Ho, Dirk Pleiter, Antoni Portero, Estela Suarez, Polydoros Petrakis, Vassilis Papaefstathiou, Manolis Marazakis, Milan Radulovic, Francesc Martínez, Adrià Armejach, Marc Casas, Alejandro Nocua, Romain Dolbeau
Multilevel simulation-based co-design of next generation HPC microprocessors. PMBS (2021)
Vladimir Dimic, Miquel Moretó, Marc Casas, Mateo Valero
PrioRAT: Criticality-Driven Prioritization Inside the On-Chip Memory Hierarchy. Euro-Par (2021)
John Osorio Ríos, Adrià Armejach, Eric Petit, Greg Henry, Marc Casas
Dynamically Adapting Floating-Point Precision to Accelerate Deep Neural Network Training. ICMLA (2021)
Cristobal Ortega, Lluc Alvarez, Marc Casas, Ramon Bertran, Alper Buyuktosunoglu, Alexandre E. Eichenberger, Pradip Bose, Miquel Moretó
Intelligent Adaptation of Hardware Knobs for Improving Performance and Power Consumption. IEEE Trans. Computers 70 (1) (2021)
Georgios Vavouliotis, Lluc Alvarez, Vasileios Karakostas, Konstantinos Nikas, Nectarios Koziris, Daniel A. Jiménez, Marc Casas
Exploiting Page Table Locality for Agile TLB Prefetching. ISCA (2021)
Constantino Gómez, Filippo Mantovani, Erich Focht, Marc Casas
Efficiently running SpMV on long vector architectures. PPoPP (2021)
Adrián Barredo, Juan M. Cebrian, Mateo Valero, Marc Casas, Miquel Moretó
Efficiency analysis of modern vector architectures: vector ALU sizes, core counts and clock frequencies. J. Supercomput. 76 (3) (2020)
Marc Ortiz, Florian Scheidegger, Marc Casas, A. Cristiano I. Malossi, Eduard Ayguadé
Generating Efficient DNN-Ensembles with Evolutionary Computation. CoRR (2020)
Isaac Sánchez Barrera, David Black-Schaffer, Marc Casas, Miquel Moretó, Anastasiia Stupnikova, Mihail Popov
Modeling and optimizing NUMA effects and prefetching with machine learning. ICS (2020)
Alexandre Valentin Jamet, Lluc Alvarez, Daniel A. Jiménez, Marc Casas
Characterizing the impact of last-level cache replacement policies on big-data workloads. IISWC (2020)
Vladimir Dimic, Miquel Moretó, Marc Casas, Jan Ciesko, Mateo Valero
RICH: implementing reductions in the cache hierarchy. ICS (2020)
Adrián Barredo, Juan M. Cebrian, Miquel Moretó, Marc Casas, Mateo Valero
Improving Predication Efficiency through Compaction/Restoration of SIMD Instructions. HPCA (2020)
Isaac Boixaderas, Darko Zivanovic, Sergi Moré, Javier Bartolome, David Vicente, Marc Casas, Paul M. Carpenter, Petar Radojkovic, Eduard Ayguadé
Cost-aware prediction of uncorrected DRAM errors in the field. SC (2020)
Juan M. Cebrian, Adrián Barredo, Helena Caminal, Miquel Moretó, Marc Casas, Mateo Valero
Semi-automatic validation of cycle-accurate simulation infrastructures: The case for gem5-x86. Future Gener. Comput. Syst. 112 (2020)
Sicong Zhuang, A. Cristiano I. Malossi, Marc Casas
Reducing Data Motion to Accelerate the Training of Deep Neural Networks. CoRR (2020)
Luc Jaulmes, Miquel Moretó, Mateo Valero, Mattan Erez, Marc Casas
Runtime-guided ECC protection using online estimation of memory vulnerability. SC (2020)
John Osorio Ríos, Adrià Armejach, Gulrukh Khattak, Eric Petit, Sofia Vallecorsa, Marc Casas
Evaluating Mixed-Precision Arithmetic for 3D Generative Adversarial Networks to Simulate High Energy Physics Detectors. ICMLA (2020)
Robin Kumar Sharma, Marc Casas
Wavefront parallelization of recurrent neural networks on multi-core architectures. ICS (2020)
Maria Barreda, José Ignacio Aliaga, Vicenç Beltran, Marc Casas
Iteration-fusing conjugate gradient for sparse linear systems with MPI + OmpSs. J. Supercomput. 76 (9) (2020)
Adrià Armejach, Helena Caminal, Juan M. Cebrian, Rubén Langarita, Rekai González-Alberquilla, Chris Adeniyi-Jones, Mateo Valero, Marc Casas, Miquel Moretó
Using Arm's scalable vector extension on stencil codes. J. Supercomput. 76 (3) (2020)
Ferran Plana Rius, Cecilio Angulo Bahón, Marc Casas, Josep Maria Mirats Tur
Convolutional Neural Network Training with Dynamic Epoch Ordering. CCIA (2019)
Dimitrios Chasapis, Miquel Moretó, Martin Schulz, Barry Rountree, Mateo Valero, Marc Casas
Power efficient job scheduling by predicting the impact of processor manufacturing variability. ICS (2019)
Adrián Barredo, Juan M. Cebrian, Miquel Moretó, Marc Casas, Mateo Valero
POSTER: An Optimized Predication Execution for SIMD Extensions. PACT (2019)
Pavan Balaji, Marc Casas
Special issue on the message passing interface. Parallel Comput. 86 (2019)
Adrià Armejach, Marc Casas, Miquel Moretó
Design trade-offs for emerging HPC processors based on mobile market technology. J. Supercomput. 75 (9) (2019)
Kallia Chronaki, Miquel Moretó, Marc Casas, Alejandro Rico, Rosa M. Badia, Eduard Ayguadé, Mateo Valero
On the maturity of parallel applications for asymmetric multi-core processors. J. Parallel Distributed Comput. 127 (2019)
Marc Casas, Wilfried N. Gansterer, Elias Wimmer
Resilient gossip-inspired all-reduce algorithms for high-performance computing: Potential, limitations, and open questions. Int. J. High Perform. Comput. Appl. 33 (2) (2019)
Alejandro Rico, Isaac Sánchez Barrera, José A. Joao, Joshua Randall, Marc Casas, Miquel Moretó
On the Benefits of Tasking with OpenMP. IWOMP (2019)
Emilio Castillo, Nikhil Jain, Marc Casas, Miquel Moretó, Martin Schulz, Ramón Beivide, Mateo Valero, Abhinav Bhatele
Optimizing computation-communication overlap in asynchronous task-based programs: poster. PPoPP (2019)
Emilio Castillo, Nikhil Jain, Marc Casas, Miquel Moretó, Martin Schulz, Ramón Beivide, Mateo Valero, Abhinav Bhatele
Optimizing computation-communication overlap in asynchronous task-based programs. ICS (2019)
Daniel Ruiz, Filippo Spiga, Marc Casas, Marta Garcia-Gasulla, Filippo Mantovani
Open-Source Shared Memory implementation of the HPCG benchmark: analysis, improvements and evaluation on Cavium ThunderX2. HPCS (2019)
Luc Jaulmes, Miquel Moretó, Mateo Valero, Marc Casas
A Vulnerability Factor for ECC-protected Memory. IOLTS (2019)
Constantino Gómez, Francesc Martínez, Adrià Armejach, Miquel Moretó, Filippo Mantovani, Marc Casas
Design Space Exploration of Next-Generation HPC Machines. IPDPS (2019)
Thomas Grass, Trevor E. Carlson, Alejandro Rico, Germán Ceballos, Eduard Ayguadé, Marc Casas, Miquel Moretó
Sampled Simulation of Task-Based Programs. IEEE Trans. Computers 68 (2) (2019)
Paul Caheny, Lluc Alvarez, Mateo Valero, Miquel Moretó, Marc Casas
Runtime-assisted cache coherence deactivation in task parallel programs. SC (2018)
Cristobal Ortega, Victor Garcia, Miquel Moretó, Marc Casas, Roxana Rusitoru
Data Prefetching on In-order Processors. HPCS (2018)
Lluc Alvarez, Marc Casas, Jesús Labarta, Eduard Ayguadé, Mateo Valero, Miquel Moretó
Runtime-Guided Management of Stacked DRAM Memories in Task Parallel Programs. ICS (2018)
Emilio Castillo, Lluc Alvarez, Miquel Moretó, Marc Casas, Enrique Vallejo, José Luis Bosque, Ramón Beivide, Mateo Valero
Architectural Support for Task Dependence Management with Flexible Software Scheduling. HPCA (2018)
Adrià Armejach, Helena Caminal, Juan M. Cebrian, Rekai González-Alberquilla, Chris Adeniyi-Jones, Mateo Valero, Marc Casas, Miquel Moretó
Stencil codes on a vector length agnostic architecture. PACT (2018)
Helena Caminal, Diego Caballero, Juan M. Cebrian, Roger Ferrer, Marc Casas, Miquel Moretó, Xavier Martorell, Mateo Valero
Performance and energy effects on task-based parallelized applications - User-directed versus manual vectorization. J. Supercomput. 74 (6) (2018)
Paul Caheny, Lluc Alvarez, Said Derradji, Mateo Valero, Miquel Moretó, Marc Casas
Reducing Cache Coherence Traffic with a NUMA-Aware Runtime Approach. IEEE Trans. Parallel Distributed Syst. 29 (5) (2018)
Isaac Sánchez Barrera, Marc Casas, Miquel Moretó, Eduard Ayguadé, Jesús Labarta, Mateo Valero
Graph partitioning applied to DAG scheduling to reduce NUMA effects. PPOPP (2018)
Luc Jaulmes, Miquel Moretó, Eduard Ayguadé, Jesús Labarta, Mateo Valero, Marc Casas
Asynchronous and Exact Forward Recovery for Detected Errors in Iterative Solvers. IEEE Trans. Parallel Distributed Syst. 29 (9) (2018)
Marc Ortiz, Adrián Cristal, Eduard Ayguadé, Marc Casas
Low-Precision Floating-Point Schemes for Neural Network Training. CoRR (2018)
Isaac Sánchez Barrera, Miquel Moretó, Eduard Ayguadé, Jesús Labarta, Mateo Valero, Marc Casas
Reducing Data Movement on Large Shared Memory Systems by Exploiting Computation Dependencies. ICS (2018)
Luc Jaulmes, Miquel Moretó, Mateo Valero, Marc Casas
Memory Vulnerability: A Case for Delaying Error Reporting. CoRR (2018)
Kallia Chronaki, Marc Casas, Miquel Moretó, Jaume Bosch, Rosa M. Badia
TaskGenX: A Hardware-Software Proposal for Accelerating Task Parallelism. ISC (2018)
Valentin Le Fèvre, Leonardo Bautista-Gomez, Osman S. Unsal, Marc Casas
Approximating a Multi-Grid Solver. PMBS@SC (2018)
Vladimir Dimic, Miquel Moretó, Marc Casas, Mateo Valero
Runtime-Assisted Shared Cache Insertion Policies Based on Re-reference Intervals. Euro-Par (2017)
Ilia Pietri, Sicong Zhuang, Marc Casas, Miquel Moretó, Rizos Sakellariou
Evaluating Scientific Workflow Execution on an Asymmetric Multicore Processor. Euro-Par Workshops (2017)
Kallia Chronaki, Alejandro Rico, Marc Casas, Miquel Moretó, Rosa M. Badia, Eduard Ayguadé, Jesús Labarta, Mateo Valero
Task Scheduling Techniques for Asymmetric Multi-Core Systems. IEEE Trans. Parallel Distributed Syst. 28 (7) (2017)
Iulian Brumar, Marc Casas, Miquel Moretó, Mateo Valero, Gurindar S. Sohi
ATM: Approximate Task Memoization in the Runtime System. IPDPS (2017)
Cristobal Ortega, Miquel Moretó, Marc Casas, Ramon Bertran, Alper Buyuktosunoglu, Alexandre E. Eichenberger, Pradip Bose
libPRISM: an intelligent adaptation of prefetch and SMT levels. ICS (2017)
Sicong Zhuang, Marc Casas
Iteration-fusing conjugate gradient. ICS (2017)
Marc Casas, Greg Bronevetsky
Prediction of the impact of network switch utilization on application performance via active measurement. Parallel Comput. 67 (2017)
Damian Roca, Daniel Nemirovsky, Marc Casas, Miquel Moretó, Mateo Valero, Mario Nemirovsky
iQ: An Efficient and Flexible Queue-Based Simulation Framework. MASCOTS (2017)
Kallia Chronaki, Miquel Moretó, Marc Casas, Alejandro Rico, Rosa M. Badia, Eduard Ayguadé, Jesús Labarta, Mateo Valero
POSTER: Exploiting Asymmetric Multi-Core Processors with Flexible System Sofware. PACT (2016)
Thomas Grass, Alejandro Rico, Marc Casas, Miquel Moretó, Eduard Ayguadé
TaskPoint: Sampled simulation of task-based programs. ISPASS (2016)
Dimitrios Chasapis, Marc Casas, Miquel Moretó, Raul Vidal, Eduard Ayguadé, Jesús Labarta, Mateo Valero
PARSECSs: Evaluating the Impact of Task Parallelism in the PARSEC Benchmark Suite. ACM Trans. Archit. Code Optim. 12 (4) (2016)
Paul Caheny, Marc Casas, Miquel Moretó, Hervé Gloaguen, Maxime Saintes, Eduard Ayguadé, Jesús Labarta, Mateo Valero
Reducing Cache Coherence Traffic with Hierarchical Directory Cache and NUMA-Aware Runtime Scheduling. PACT (2016)
Emilio Castillo, Miquel Moretó, Marc Casas, Lluc Alvarez, Enrique Vallejo, Kallia Chronaki, Rosa M. Badia, José Luis Bosque, Ramón Beivide, Eduard Ayguadé, Jesús Labarta, Mateo Valero
CATA: Criticality Aware Task Acceleration for Multicore Processors. IPDPS (2016)
Thomas Grass, César Allande, Adrià Armejach, Alejandro Rico, Eduard Ayguadé, Jesús Labarta, Mateo Valero, Marc Casas, Miquel Moretó
MUSA: a multi-level simulation approach for next-generation HPC machines. SC (2016)
Marc Casas, Greg Bronevetsky
Evaluation of HPC Applications' Memory Resource Consumption via Active Measurement. IEEE Trans. Parallel Distributed Syst. 27 (9) (2016)
Dimitrios Chasapis, Marc Casas, Miquel Moretó, Martin Schulz, Eduard Ayguadé, Jesús Labarta, Mateo Valero
Runtime-Guided Mitigation of Manufacturing Variability in Power-Constrained Multi-Socket NUMA Nodes. ICS (2016)
Raul Vidal, Marc Casas, Miquel Moretó, Dimitrios Chasapis, Roger Ferrer, Xavier Martorell, Eduard Ayguadé, Jesús Labarta, Mateo Valero
Evaluating the Impact of OpenMP 4.0 Extensions on Relevant Parallel Workloads. IWOMP (2015)
Marc Casas, Miquel Moretó, Lluc Alvarez, Emilio Castillo, Dimitrios Chasapis, Timothy Hayes, Luc Jaulmes, Oscar Palomar, Osman S. Unsal, Adrián Cristal, Eduard Ayguadé, Jesús Labarta, Mateo Valero
Runtime-Aware Architectures. Euro-Par (2015)
Lluc Alvarez, Miquel Moretó, Marc Casas, Emilio Castillo, Xavier Martorell, Jesús Labarta, Eduard Ayguadé, Mateo Valero
Runtime-Guided Management of Scratchpad Memories in Multicore Architectures. PACT (2015)
Luc Jaulmes, Marc Casas, Miquel Moretó, Eduard Ayguadé, Jesús Labarta, Mateo Valero
Exploiting asynchrony from exact forward recovery for DUE in iterative solvers. SC (2015)
Lluc Alvarez, Lluís Vilanova, Miquel Moretó, Marc Casas, Marc González, Xavier Martorell, Nacho Navarro, Eduard Ayguadé, Mateo Valero
Coherence protocol for transparent management of scratchpad memories in shared memory manycore architectures. ISCA (2015)
David Prat, Cristobal Ortega, Marc Casas, Miquel Moretó, Mateo Valero
Adaptive and application dependent runtime guided hardware prefetcher reconfiguration on the IBM POWER7. CoRR (2015)
Thomas Grass, Alejandro Rico, Marc Casas, Miquel Moretó, Alex Ramírez
Evaluating Execution Time Predictability of Task-Based Programs on Multi-Core Processors. Euro-Par Workshops (2) (2014)
Marc Casas, Greg Bronevetsky
Active Measurement of Memory Resource Consumption. IPDPS (2014)
Marc Casas, Greg Bronevetsky
Active Measurement of the Impact of Network Switch Utilization on Application Performance. IPDPS (2014)

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Publication Activity (10 Years)

Top Topics

Top Venues

Marc Casas