Mateo Valero

ORCID

Publication Activity (10 Years)

Years Active: 1982-2024
Publications (10 Years): 79

Top Venues

Publications

Julian Pavon, Iván Vargas Valdivieso, Carlos Rojas, César Hernández, Mehmet Aslan, Roger Figueras, Yichao Yuan, Joël Lindegger, Mohammed Alser, Francesc Moll, Santiago Marco-Sola, Oguz Ergin, Nishil Talati, Onur Mutlu, Osman S. Unsal, Mateo Valero, Adrián Cristal
QUETZAL: Vector Acceleration Framework for Modern Genome Sequence Analysis Algorithms. ISCA (2024)
Francesco Minervini, Oscar Palomar, Osman S. Unsal, Enrico Reggiani, Josue V. Quiroga, Joan Marimon, Carlos Rojas, Roger Figueras, Abraham Ruiz, Alberto González, Jonnatan Mendoza, Iván Vargas, César Hernández, Joan Cabre, Lina Khoirunisya, Mustapha Bouhali, Julian Pavon, Francesc Moll, Mauro Olivieri, Mario Kovac, Mate Kovac, Leon Dragic, Mateo Valero, Adrián Cristal
Vitruvius+: An Area-Efficient RISC-V Decoupled Vector Coprocessor for High Performance Computing Applications. ACM Trans. Archit. Code Optim. 20 (2) (2023)
Max Doblas, Gerard Candón, Xavier Carril, Marc Domínguez, Enric Erra, Alberto González, César Hernández, Víctor Jiménez, Vatistas Kostalampros, Rubén Langarita, Neiel Leyva, Guillem López-Paradís, Jonnatan Mendoza, Josep Oltra, Julián Pavón, Cristóbal Ramírez, Narcís Rodas, Enrico Reggiani, Mario Rodríguez, Carlos Rojas, Abraham Ruiz, Hugo Safadi, Víctor Soria, Alejandro Suanes, Iván Vargas, Fernando Arreza, Roger Figueras, Pau Fontova-Musté, Joan Marimon, Ricardo Martínez, Sergio Moreno, Jordi Sacristán, Oscar Alonso, Xavier Aragonès, Adrián Cristal, Ángel Diéguez, Manuel López, Diego Mateo, Francesc Moll, Miquel Moretó, Oscar Palomar, Marco A. Ramírez, Francesc Serra-Graells, Nehir Sönmez, Lluís Terés, Osman S. Unsal, Mateo Valero, Luis Villa
Sargantana: An Academic SoC RISC-V Processor in 22nm FDSOI Technology. DCIS (2023)
Julián Pavón, Iván Vargas Valdivieso, Joan Marimon, Roger Figueras, Francesc Moll, Osman S. Unsal, Mateo Valero, Adrián Cristal
VAQUERO: A Scratchpad-based Vector Accelerator for Query Processing. HPCA (2023)
Guillem Cabo, Gerard Candón, Xavier Carril, Max Doblas, Marc Domínguez, Alberto González, César Hernández, Víctor Jiménez, Vatistas Kostalampros, Rubén Langarita, Neiel Leyva, Guillem López-Paradís, Jonnatan Mendoza, Francesco Minervini, Julián Pavón, Cristóbal Ramírez, Narcís Rodas, Enrico Reggiani, Mario Rodríguez, Carlos Rojas, Abraham Ruiz, Víctor Soria, Alejandro Suanes, Iván Vargas, Roger Figueras, Pau Fontova, Joan Marimon, Víctor Montabes, Adrián Cristal, Carles Hernández, Ricardo Martínez, Miquel Moretó, Francesc Moll, Oscar Palomar, Marco A. Ramírez, Antonio Rubio, Jordi Sacristán, Francesc Serra-Graells, Nehir Sönmez, Lluís Terés, Osman Unsal, Mateo Valero, Luís Villa
DVINO: A RISC-V Vector Processor Implemented in 65nm Technology. DCIS (2022)
Ulises Cortés, Eduardo Ulises Moya-Sánchez, Mateo Valero
When Sally Met Harry or When AI Met HPC. Supercomput. Front. Innov. 8 (1) (2021)
Vladimir Dimic, Miquel Moretó, Marc Casas, Mateo Valero
PrioRAT: Criticality-Driven Prioritization Inside the On-Chip Memory Hierarchy. Euro-Par (2021)
Veljko M. Milutinovic, Erfan Sadeqi Azer, Kristy Yoshimoto, Gerhard Klimeck, Miljan Djordjevic, Milos Kotlar, Miroslav Bojovic, Bozidar Miladinovic, Nenad Korolija, Stevan Stankovic, Nenad Filipovic, Zoran Babovic, Miroslav Kosanic, Akira Tsuda, Mateo Valero, Massimo De Santo, Erich J. Neuhold, Jelena Skorucak, Laura Dipietro, Ivan Ratkovic
The Ultimate DataFlow for Ultimate SuperComputers-on-a-Chip, for Scientific Computing, Geo Physics, Complex Mathematics, and Information Processing. MECO (2021)
Julian Pavon, Iván Vargas Valdivieso, Adrián Barredo, Joan Marimon, Miquel Moretó, Francesc Moll, Osman S. Unsal, Mateo Valero, Adrián Cristal
VIA: A Smart Scratchpad for Vector Units with Application to Sparse Matrix Computations. HPCA (2021)
Adrián Barredo, Juan M. Cebrian, Mateo Valero, Marc Casas, Miquel Moretó
Efficiency analysis of modern vector architectures: vector ALU sizes, core counts and clock frequencies. J. Supercomput. 76 (3) (2020)
Jaume Abella, Calvin Bulla, Guillem Cabo, Francisco J. Cazorla, Adrián Cristal, Max Doblas, Roger Figueras, Alberto González, Carles Hernández, César Hernández, Víctor Jiménez, Leonidas Kosmidis, Vatistas Kostalabros, Rubén Langarita, Neiel Leyva, Guillem López-Paradís, Joan Marimon, Ricardo Martínez, Jonnatan Mendoza, Francesc Moll, Miquel Moretó, Julián Pavón, Cristóbal Ramírez, Marco Antonio Ramírez, Carlos Rojas Morales, Antonio Rubio, Abraham Ruiz, Nehir Sönmez, Víctor Soria, Lluís Terés, Osman S. Unsal, Mateo Valero, Iván Vargas Valdivieso, Luis Villa
An Academic RISC-V Silicon Implementation Based on Open-Source Components. DCIS (2020)
Javier Ferrando, Juan Luis Domínguez, Jordi Torres, Raúl García, David García, Daniel Garrido, Jordi Cortada, Mateo Valero
Improving accuracy and speeding up Document Image Classification through parallel systems. CoRR (2020)
Vladimir Dimic, Miquel Moretó, Marc Casas, Jan Ciesko, Mateo Valero
RICH: implementing reductions in the cache hierarchy. ICS (2020)
Adrián Barredo, Juan M. Cebrian, Miquel Moretó, Marc Casas, Mateo Valero
Improving Predication Efficiency through Compaction/Restoration of SIMD Instructions. HPCA (2020)
Juan M. Cebrian, Adrián Barredo, Helena Caminal, Miquel Moretó, Marc Casas, Mateo Valero
Semi-automatic validation of cycle-accurate simulation infrastructures: The case for gem5-x86. Future Gener. Comput. Syst. 112 (2020)
Javier Ferrando, Juan Luis Domínguez, Jordi Torres, Raúl García, David García, Daniel Garrido, Jordi Cortada, Mateo Valero
Improving Accuracy and Speeding Up Document Image Classification Through Parallel Systems. ICCS (2) (2020)
Luc Jaulmes, Miquel Moretó, Mateo Valero, Mattan Erez, Marc Casas
Runtime-guided ECC protection using online estimation of memory vulnerability. SC (2020)
Veljko Milutinovic, Milos Kotlar, Ivan Ratkovic, Nenad Korolija, Miljan Djordjevic, Kristy Yoshimoto, Erik Klem, Mateo Valero
The Ultimate DataFlow for Ultimate SuperComputers-on-a-Chips. CoRR (2020)
Adrià Armejach, Helena Caminal, Juan M. Cebrian, Rubén Langarita, Rekai González-Alberquilla, Chris Adeniyi-Jones, Mateo Valero, Marc Casas, Miquel Moretó
Using Arm's scalable vector extension on stencil codes. J. Supercomput. 76 (3) (2020)
Damian Roca, Rodolfo A. Milito, Mario Nemirovsky, Mateo Valero
Advances in the Hierarchical Emergent Behaviors (HEB) Approach to Autonomous Vehicles. IEEE Intell. Transp. Syst. Mag. 12 (4) (2020)
Xubin Tan, Jaume Bosch, Carlos Álvarez, Daniel Jiménez-González, Eduard Ayguadé, Mateo Valero
A Hardware Runtime for Task-Based Programming Models. IEEE Trans. Parallel Distributed Syst. 30 (9) (2019)
Dimitrios Chasapis, Miquel Moretó, Martin Schulz, Barry Rountree, Mateo Valero, Marc Casas
Power efficient job scheduling by predicting the impact of processor manufacturing variability. ICS (2019)
Feng Zhang, Jidong Zhai, Marc Snir, Hai Jin, Hironori Kasahara, Mateo Valero
Guest Editorial: Special Issue on Network and Parallel Computing for Emerging Architectures and Applications. Int. J. Parallel Program. 47 (3) (2019)
Adrián Barredo, Juan M. Cebrian, Miquel Moretó, Marc Casas, Mateo Valero
POSTER: An Optimized Predication Execution for SIMD Extensions. PACT (2019)
Kallia Chronaki, Miquel Moretó, Marc Casas, Alejandro Rico, Rosa M. Badia, Eduard Ayguadé, Mateo Valero
On the maturity of parallel applications for asymmetric multi-core processors. J. Parallel Distributed Comput. 127 (2019)
Fabrizio Gagliardi, Miquel Moretó, Mauro Olivieri, Mateo Valero
The international race towards Exascale in Europe. CCF Trans. High Perform. Comput. 1 (1) (2019)
Emilio Castillo, Nikhil Jain, Marc Casas, Miquel Moretó, Martin Schulz, Ramón Beivide, Mateo Valero, Abhinav Bhatele
Optimizing computation-communication overlap in asynchronous task-based programs: poster. PPoPP (2019)
Emilio Castillo, Nikhil Jain, Marc Casas, Miquel Moretó, Martin Schulz, Ramón Beivide, Mateo Valero, Abhinav Bhatele
Optimizing computation-communication overlap in asynchronous task-based programs. ICS (2019)
Luc Jaulmes, Miquel Moretó, Mateo Valero, Marc Casas
A Vulnerability Factor for ECC-protected Memory. IOLTS (2019)
Daniel Nemirovsky, Tugberk Arkose, Nikola Markovic, Mario Nemirovsky, Osman S. Unsal, Adrián Cristal, Mateo Valero
A General Guide to Applying Machine Learning to Computer Architecture. Supercomput. Front. Innov. 5 (1) (2018)
Paul Caheny, Lluc Alvarez, Mateo Valero, Miquel Moretó, Marc Casas
Runtime-assisted cache coherence deactivation in task parallel programs. SC (2018)
Lluc Alvarez, Marc Casas, Jesús Labarta, Eduard Ayguadé, Mateo Valero, Miquel Moretó
Runtime-Guided Management of Stacked DRAM Memories in Task Parallel Programs. ICS (2018)
Ivan Ratkovic, Oscar Palomar, Milan Stanic, Osman Sabri Unsal, Adrián Cristal, Mateo Valero
Vector Processing-Aware Advanced Clock-Gating Techniques for Low-Power Fused Multiply-Add. IEEE Trans. Very Large Scale Integr. Syst. 26 (4) (2018)
Emilio Castillo, Lluc Alvarez, Miquel Moretó, Marc Casas, Enrique Vallejo, José Luis Bosque, Ramón Beivide, Mateo Valero
Architectural Support for Task Dependence Management with Flexible Software Scheduling. HPCA (2018)
Adrià Armejach, Helena Caminal, Juan M. Cebrian, Rekai González-Alberquilla, Chris Adeniyi-Jones, Mateo Valero, Marc Casas, Miquel Moretó
Stencil codes on a vector length agnostic architecture. PACT (2018)
Helena Caminal, Diego Caballero, Juan M. Cebrian, Roger Ferrer, Marc Casas, Miquel Moretó, Xavier Martorell, Mateo Valero
Performance and energy effects on task-based parallelized applications - User-directed versus manual vectorization. J. Supercomput. 74 (6) (2018)
Paul Caheny, Lluc Alvarez, Said Derradji, Mateo Valero, Miquel Moretó, Marc Casas
Reducing Cache Coherence Traffic with a NUMA-Aware Runtime Approach. IEEE Trans. Parallel Distributed Syst. 29 (5) (2018)
Isaac Sánchez Barrera, Marc Casas, Miquel Moretó, Eduard Ayguadé, Jesús Labarta, Mateo Valero
Graph partitioning applied to DAG scheduling to reduce NUMA effects. PPOPP (2018)
Luc Jaulmes, Miquel Moretó, Eduard Ayguadé, Jesús Labarta, Mateo Valero, Marc Casas
Asynchronous and Exact Forward Recovery for Detected Errors in Iterative Solvers. IEEE Trans. Parallel Distributed Syst. 29 (9) (2018)
Isaac Sánchez Barrera, Miquel Moretó, Eduard Ayguadé, Jesús Labarta, Mateo Valero, Marc Casas
Reducing Data Movement on Large Shared Memory Systems by Exploiting Computation Dependencies. ICS (2018)
Luc Jaulmes, Miquel Moretó, Mateo Valero, Marc Casas
Memory Vulnerability: A Case for Delaying Error Reporting. CoRR (2018)
Daniel Nemirovsky, Tugberk Arkose, Nikola Markovic, Mario Nemirovsky, Osman S. Unsal, Adrián Cristal, Mateo Valero
A Deep Learning Mapper (DLM) for Scheduling on Heterogeneous Systems. CARLA (2017)
Xubin Tan, Jaume Bosch, Miquel Vidal, Carlos Álvarez, Daniel Jiménez-González, Eduard Ayguadé, Mateo Valero
General Purpose Task-Dependence Management Hardware for Task-Based Dataflow Programming Models. IPDPS (2017)
Esteban Stafford, Borja Pérez, José Luis Bosque, Ramón Beivide, Mateo Valero
To Distribute or Not to Distribute: The Question of Load Balancing for Performance or Energy. Euro-Par (2017)
Vladimir Dimic, Miquel Moretó, Marc Casas, Mateo Valero
Runtime-Assisted Shared Cache Insertion Policies Based on Re-reference Intervals. Euro-Par (2017)
Qixiao Liu, Miquel Moretó, Jaume Abella, Francisco J. Cazorla, Mateo Valero
SEDEA: A Sensible Approach to Account DRAM Energy in Multicore Systems. SBAC-PAD (2017)
Lluís Vilanova, Marc Jordà, Nacho Navarro, Yoav Etsion, Mateo Valero
Direct Inter-Process Communication (dIPC): Repurposing the CODOMs Architecture to Accelerate IPC. EuroSys (2017)
Pablo Fuentes, Mariano Benito, Enrique Vallejo, José Luis Bosque, Ramón Beivide, Andreea Anghel, Germán Rodríguez, Mitch Gusat, Cyriel Minkenberg, Mateo Valero
A scalable synthetic traffic model of Graph500 for computer networks analysis. Concurr. Comput. Pract. Exp. 29 (24) (2017)
Kallia Chronaki, Alejandro Rico, Marc Casas, Miquel Moretó, Rosa M. Badia, Eduard Ayguadé, Jesús Labarta, Mateo Valero
Task Scheduling Techniques for Asymmetric Multi-Core Systems. IEEE Trans. Parallel Distributed Syst. 28 (7) (2017)
Iulian Brumar, Marc Casas, Miquel Moretó, Mateo Valero, Gurindar S. Sohi
ATM: Approximate Task Memoization in the Runtime System. IPDPS (2017)
Mateo Valero
Runtime Aware Architectures. Conf. Computing Frontiers (2017)
Damian Roca, Josue V. Quiroga, Mateo Valero, Mario Nemirovsky
Fog Function Virtualization: A flexible solution for IoT applications. FMEC (2017)
Milan Stanic, Oscar Palomar, Timothy Hayes, Ivan Ratkovic, Adrián Cristal, Osman S. Unsal, Mateo Valero
An Integrated Vector-Scalar Design on an In-Order ARM Core. ACM Trans. Archit. Code Optim. 14 (2) (2017)
Xubin Tan, Jaume Bosch, Miquel Vidal, Carlos Álvarez, Daniel Jiménez-González, Eduard Ayguadé, Mateo Valero
Picos, A Hardware Task-Dependence Manager for Task-Based Dataflow Programming Models. HPCS (2017)
Vesna Smiljkovic, Osman S. Ünsal, Adrián Cristal, Mateo Valero
Determinism at Standard-Library Level in TM-Based Applications. Int. J. Parallel Program. 45 (1) (2017)
Pablo Fuentes, Enrique Vallejo, Ramón Beivide, Cyriel Minkenberg, Mateo Valero
FlexVC: Flexible Virtual Channel Management in Low-Diameter Networks. IPDPS (2017)
Mateo Valero
Runtime Aware Architectures. IPDPS (2017)
Damian Roca, Daniel Nemirovsky, Marc Casas, Miquel Moretó, Mateo Valero, Mario Nemirovsky
iQ: An Efficient and Flexible Queue-Based Simulation Framework. MASCOTS (2017)
Kallia Chronaki, Miquel Moretó, Marc Casas, Alejandro Rico, Rosa M. Badia, Eduard Ayguadé, Jesús Labarta, Mateo Valero
POSTER: Exploiting Asymmetric Multi-Core Processors with Flexible System Sofware. PACT (2016)
Nikola Rajovic, Alejandro Rico, Filippo Mantovani, Daniel Ruiz, Josep Oriol Vilarrubi, Constantino Gómez, Luna Backes, Diego Nieto, Harald Servat, Xavier Martorell, Jesús Labarta, Eduard Ayguadé, Chris Adeniyi-Jones, Said Derradji, Hervé Gloaguen, Piero Lanucara, Nico Sanna, Jean-François Méhaut, Kevin Pouget, Brice Videau, Eric Boyer, Momme Allalen, Axel Auweter, David Brayford, Daniele Tafani, Volker Weinberg, Dirk Brömmel, René Halver, Jan H. Meinke, Ramón Beivide, Mariano Benito, Enrique Vallejo, Mateo Valero, Alex Ramírez
The mont-blanc prototype: an alternative approach for HPC systems. SC (2016)
Dimitrios Chasapis, Marc Casas, Miquel Moretó, Raul Vidal, Eduard Ayguadé, Jesús Labarta, Mateo Valero
PARSECSs: Evaluating the Impact of Task Parallelism in the PARSEC Benchmark Suite. ACM Trans. Archit. Code Optim. 12 (4) (2016)
Mariano Vázquez, Guillaume Houzeaux, Seid Koric, Antoni Artigues, Jazmin Aguado-Sierra, Ruth Aris, Daniel Mira, Hadrien Calmet, Fernando M. Cucchietti, Herbert Coppola-Owen, Ahmed Taha, Evan Dering Burness, José María Cela, Mateo Valero
Alya: Multiphysics engineering simulation toward exascale. J. Comput. Sci. 14 (2016)
Paul Caheny, Marc Casas, Miquel Moretó, Hervé Gloaguen, Maxime Saintes, Eduard Ayguadé, Jesús Labarta, Mateo Valero
Reducing Cache Coherence Traffic with Hierarchical Directory Cache and NUMA-Aware Runtime Scheduling. PACT (2016)
Emilio Castillo, Miquel Moretó, Marc Casas, Lluc Alvarez, Enrique Vallejo, Kallia Chronaki, Rosa M. Badia, José Luis Bosque, Ramón Beivide, Eduard Ayguadé, Jesús Labarta, Mateo Valero
CATA: Criticality Aware Task Acceleration for Multicore Processors. IPDPS (2016)
Ivan Ratkovic, Oscar Palomar, Milan Stanic, Osman S. Unsal, Adrián Cristal, Mateo Valero
A Fully Parameterizable Low Power Design of Vector Fused Multiply-Add Using Active Clock-Gating Techniques. ISLPED (2016)
Mateo Valero
Runtime aware architectures. GPGPU@PPoPP (2016)
Qixiao Liu, Miquel Moretó, Jaume Abella, Francisco J. Cazorla, Mateo Valero
DReAM: An Approach to Estimate per-Task DRAM Energy in Multicore Systems. ACM Trans. Design Autom. Electr. Syst. 22 (1) (2016)
Qixiao Liu, Miquel Moretó, Jaume Abella, Francisco J. Cazorla, Daniel A. Jiménez, Mateo Valero
Sensible Energy Accounting with Abstract Metering for Multicore Systems. ACM Trans. Archit. Code Optim. 12 (4) (2016)
Damian Roca, Daniel Nemirovsky, Mario Nemirovsky, Rodolfo A. Milito, Mateo Valero
Emergent Behaviors in the Internet of Things: The Ultimate Ultra-Large-Scale System. IEEE Micro 36 (6) (2016)
Milan Stanic, Oscar Palomar, Timothy Hayes, Ivan Ratkovic, Osman S. Unsal, Adrián Cristal, Mateo Valero
POSTER: An Integrated Vector-Scalar Design on an In-order ARM Core. PACT (2016)
Mateo Valero
Runtime Aware Architectures. DCNET (2016)
Xubin Tan, Jaume Bosch, Daniel Jiménez-González, Carlos Álvarez-Martínez, Eduard Ayguadé, Mateo Valero
Performance analysis of a hardware accelerator of dependence management for task-based dataflow programming models. ISPASS (2016)
Pablo Fuentes, Enrique Vallejo, Cristobal Camarero, Ramón Beivide, Mateo Valero
Network unfairness in dragonfly topologies. J. Supercomput. 72 (12) (2016)
Mateo Valero
Runtime Aware Architectures. PECCS (2016)
Petar Radojkovic, Paul M. Carpenter, Miquel Moretó, Vladimir Cakarevic, Javier Verdú, Alex Pajuelo, Francisco J. Cazorla, Mario Nemirovsky, Mateo Valero
Thread Assignment in Multicore/Multithreaded Processors: A Statistical Approach. IEEE Trans. Computers 65 (1) (2016)
Roman Trobec, Radivoje Vasiljevic, Milo Tomasevic, Veljko Milutinovic, Ramón Beivide, Mateo Valero
Interconnection Networks in Petascale Computer Systems: A Survey. ACM Comput. Surv. 49 (3) (2016)
Thomas Grass, César Allande, Adrià Armejach, Alejandro Rico, Eduard Ayguadé, Jesús Labarta, Mateo Valero, Marc Casas, Miquel Moretó
MUSA: a multi-level simulation approach for next-generation HPC machines. SC (2016)
Timothy Hayes, Oscar Palomar, Osman S. Unsal, Adrián Cristal, Mateo Valero
Future Vector Microprocessor Extensions for Data Aggregations. ISCA (2016)
Dimitrios Chasapis, Marc Casas, Miquel Moretó, Martin Schulz, Eduard Ayguadé, Jesús Labarta, Mateo Valero
Runtime-Guided Mitigation of Manufacturing Variability in Power-Constrained Multi-Socket NUMA Nodes. ICS (2016)
Raul Vidal, Marc Casas, Miquel Moretó, Dimitrios Chasapis, Roger Ferrer, Xavier Martorell, Eduard Ayguadé, Jesús Labarta, Mateo Valero
Evaluating the Impact of OpenMP 4.0 Extensions on Relevant Parallel Workloads. IWOMP (2015)
Timothy Hayes, Oscar Palomar, Osman S. Unsal, Adrián Cristal, Mateo Valero
VSR sort: A novel vectorised sorting algorithm & architecture extensions for future microprocessors. HPCA (2015)
Nikola Markovic, Daniel Nemirovsky, Osman S. Unsal, Mateo Valero, Adrián Cristal
Kernel-to-User-Mode Transition-Aware Hardware Scheduling. IEEE Micro 35 (4) (2015)
Nikola Markovic, Daniel Nemirovsky, Osman S. Ünsal, Mateo Valero, Adrián Cristal
Thread Lock Section-Aware Scheduling on Asymmetric Single-ISA Multi-Core. IEEE Comput. Archit. Lett. 14 (2) (2015)
Marc Casas, Miquel Moretó, Lluc Alvarez, Emilio Castillo, Dimitrios Chasapis, Timothy Hayes, Luc Jaulmes, Oscar Palomar, Osman S. Unsal, Adrián Cristal, Eduard Ayguadé, Jesús Labarta, Mateo Valero
Runtime-Aware Architectures. Euro-Par (2015)
Fahimeh Yazdanpanah, Carlos Álvarez, Daniel Jiménez-González, Rosa M. Badia, Mateo Valero
Picos: A hardware runtime architecture support for OmpSs. Future Gener. Comput. Syst. 53 (2015)
Ivan Ratkovic, Oscar Palomar, Milan Stanic, Milovan Duric, Djordje Peic, Osman S. Unsal, Adrián Cristal, Mateo Valero
Joint Circuit-System Design Space Exploration of Multiplier Unit Structure for Energy-Efficient Vector Processors. ISVLSI (2015)
Anton Kos, Saso Tomazic, Jakob Salom, Nemanja Trifunovic, Mateo Valero, Veljko Milutinovic
New Benchmarking Methodology and Programming Model for Big Data Processing. Int. J. Distributed Sens. Networks 11 (2015)
Nikola Markovic, Daniel Nemirovsky, Osman S. Unsal, Mateo Valero, Adrián Cristal
Performance and Energy Efficient Hardware-Based Scheduler for Symmetric/Asymmetric CMPs. SBAC-PAD (2015)
Daniel Nemirovsky, Nikola Markovic, Osman S. Unsal, Mateo Valero, Adrián Cristal
Reimagining Heterogeneous Computing: A Functional Instruction-Set Architecture Computing Model. IEEE Micro 35 (5) (2015)
Víctor Jiménez, Alper Buyuktosunoglu, Pradip Bose, Francis P. O'Connell, Francisco J. Cazorla, Mateo Valero
Increasing multicore system efficiency through intelligent bandwidth shifting. HPCA (2015)
Rubén Tous, Anastasios Gounaris, Carlos Tripiana, Jordi Torres, Sergi Girona, Eduard Ayguadé, Jesús Labarta, Yolanda Becerra, David Carrera, Mateo Valero
Spark deployment and performance evaluation on the MareNostrum supercomputer. IEEE BigData (2015)
Nikola Markovic, Daniel Nemirovsky, Veljko Milutinovic, Osman S. Unsal, Mateo Valero, Adrián Cristal
Hardware Round-Robin Scheduler for Single-ISA Asymmetric Multi-core. Euro-Par (2015)
Lluc Alvarez, Miquel Moretó, Marc Casas, Emilio Castillo, Xavier Martorell, Jesús Labarta, Eduard Ayguadé, Mateo Valero
Runtime-Guided Management of Scratchpad Memories in Multicore Architectures. PACT (2015)
Luc Jaulmes, Marc Casas, Miquel Moretó, Eduard Ayguadé, Jesús Labarta, Mateo Valero
Exploiting asynchrony from exact forward recovery for DUE in iterative solvers. SC (2015)
Lluc Alvarez, Lluís Vilanova, Miquel Moretó, Marc Casas, Marc González, Xavier Martorell, Nacho Navarro, Eduard Ayguadé, Mateo Valero
Coherence protocol for transparent management of scratchpad memories in shared memory manycore architectures. ISCA (2015)
Pablo Fuentes, Enrique Vallejo, Cristobal Camarero, Ramón Beivide, Mateo Valero
Throughput Unfairness in Dragonfly Networks under Realistic Traffic Patterns. CLUSTER (2015)
Pablo Fuentes, Enrique Vallejo, Marina García, Ramón Beivide, Germán Rodríguez, Cyriel Minkenberg, Mateo Valero
Contention-Based Nonminimal Adaptive Routing in High-Radix Networks. IPDPS (2015)
David Prat, Cristobal Ortega, Marc Casas, Miquel Moretó, Mateo Valero
Adaptive and application dependent runtime guided hardware prefetcher reconfiguration on the IBM POWER7. CoRR (2015)
Kallia Chronaki, Alejandro Rico, Rosa M. Badia, Eduard Ayguadé, Jesús Labarta, Mateo Valero
Criticality-Aware Dynamic Task Scheduling for Heterogeneous Architectures. ICS (2015)
Marina García, Enrique Vallejo, Ramón Beivide, Cristobal Camarero, Mateo Valero, Germán Rodríguez, Cyriel Minkenberg
On-the-fly adaptive routing for dragonfly interconnection networks. J. Supercomput. 71 (3) (2015)

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Publication Activity (10 Years)

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Mateo Valero