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A Fully Parameterizable Low Power Design of Vector Fused Multiply-Add Using Active Clock-Gating Techniques.
Ivan Ratkovic
Oscar Palomar
Milan Stanic
Osman S. Unsal
Adrián Cristal
Mateo Valero
Published in:
ISLPED (2016)
Keyphrases
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low power
power consumption
power reduction
power dissipation
low power consumption
single chip
low cost
clock gating
vlsi architecture
high speed
logic circuits
gate array
digital signal processing
cmos technology
vlsi circuits
mixed signal
power management
ultra low power
efficient implementation
circuit design