Hironori Kasahara

Publication Activity (10 Years)

Years Active: 1984-2023
Publications (10 Years): 29

Top Topics

Organizing Committee

Parallel Computing

Monitoring System

Top Venues

Publications

John Vincent Atanasoff, Gordon Bell, Kiril L. Boyanov, Charles G. Call, Carl K. Chang, Thomas M. Conte, Vladimir Getov, John L. Gustafson, Hironori Kasahara, Dejan S. Milojicic, Michael R. Williams
The Invention of Electronic Digital Computing - Plenary Panel Summary. JVA (2023)
Tohma Kawasumi, Yuta Tsumura, Hiroki Mikami, Tomoya Yoshikawa, Takero Hosomi, Shingo Oidate, Keiji Kimura, Hironori Kasahara
Parallelizing Factory Automation Ladder Programs by OSCAR Automatic Parallelizing Compiler. LCPC (2022)
Jixin Han, Tomofumi Yuki, Michelle Mills Strout, Dan Umeda, Hironori Kasahara, Keiji Kimura
Parallelizing Compiler Translation Validation Using Happens-Before and Task-Set. CANDAR (Workshops) (2021)
Shaoshan Liu, Jean-Luc Gaudiot, Hironori Kasahara
Engineering Education in the Age of Autonomous Machines. CoRR (2021)
Birk Martin Magnussen, Tohma Kawasumi, Hiroki Mikami, Keiji Kimura, Hironori Kasahara
Performance Evaluation of OSCAR Multi-target Automatic Parallelizing Compiler on Intel, AMD, Arm and RISC-V Multicores. LCPC (2021)
Shaoshan Liu, Jean-Luc Gaudiot, Hironori Kasahara
Engineering Education in the Age of Autonomous Machines. Computer 54 (4) (2021)
Hironori Kasahara, Keiji Kimura, Toshiaki Kitamura, Hiroki Mikami, Kazutaka Morita, Kazuki Fujita, Kazuki Yamamoto, Tohma Kawasumi
OSCAR Parallelizing and Power Reducing Compiler and API for Heterogeneous Multicores : (Invited Paper). PEHC@SC (2021)
Yoshitake Oki, Yuto Abe, Kazuki Yamamoto, Kohei Yamamoto, Tomoya Shirakawa, Akimasa Yoshida, Keiji Kimura, Hironori Kasahara
Local Memory Mapping of Multicore Processors on an Automatic Parallelizing Compiler. IEICE Trans. Electron. (3) (2020)
Jean-Luc Gaudiot, Hironori Kasahara
Computer Education in the Age of COVID-19. Computer 53 (10) (2020)
Boma A. Adhi, Tomoya Kashimata, Ken Takahashi, Keiji Kimura, Hironori Kasahara
Compiler Software Coherent Control for Embedded High Performance Multicore. IEICE Trans. Electron. (3) (2020)
Tohma Kawasumi, Ryota Tamura, Yuya Asada, Jixin Han, Hiroki Mikami, Keiji Kimura, Hironori Kasahara
Fast and Highly Optimizing Separate Compilation for Automatic Parallelization. HPCS (2019)
Tomoya Kashimata, Toshiaki Kitamura, Keiji Kimura, Hironori Kasahara
Cascaded DMA Controller for Speedup of Indirect Memory Access in Irregular Applications. IA3@SC (2019)
Feng Zhang, Jidong Zhai, Marc Snir, Hai Jin, Hironori Kasahara, Mateo Valero
Guest Editorial: Special Issue on Network and Parallel Computing for Emerging Architectures and Applications. Int. J. Parallel Program. 47 (3) (2019)
Yoshitake Oki, Hiroki Mikami, Hikaru Nishida, Dan Umeda, Keiji Kimura, Hironori Kasahara
Performance of Static and Dynamic Task Scheduling for Real-Time Engine Control System on Embedded Multicore Processor. LCPC (2019)
Hironori Kasahara
Collaboration for the Future. Computer 52 (1) (2019)
Hironori Kasahara
Satisfaction and Sustainability. Computer 51 (1) (2018)
Boma A. Adhi, Masayoshi Mase, Yuhei Hosokawa, Yohei Kishimoto, Taisuke Onishi, Hiroki Mikami, Keiji Kimura, Hironori Kasahara
Software Cache Coherent Control by Parallelizing Compiler. LCPC (2017)
Hironori Kasahara, Keiji Kimura, Boma A. Adhi, Yuhei Hosokawa, Yohei Kishimoto, Masayoshi Mase
Multicore Cache Coherence Control by a Parallelizing Compiler. COMPSAC (1) (2017)
Hideharu Amano, Tadao Nakamura, Hiroaki Kobayashi, Hironori Kasahara, Yoshiaki Hagiwara, Jeffrey L. Burns, David Brash
Panel discussions: "Cool chips for the next decade". COOL Chips (2017)
Cristina Seceleanu, Hironori Kasahara, Tiberiu Seceleanu
Message from the CAP 2017 Organizing Committee. COMPSAC (1) (2017)
Koichiro Yamashita, Takahisa Suzuki, Hongchun Li, Chen Ao, Yi Xu, Jun Tian, Keiji Kimura, Hironori Kasahara
Architecture Design for the Environmental Monitoring System over the Winter Season. MobiWac (2016)
Keiji Kimura, Gakuho Taguchi, Hironori Kasahara
Accelerating Multicore Architecture Simulation Using Application Profile. MCSoC (2016)
Jixin Han, Rina Fujino, Ryota Tamura, Mamoru Shimaoka, Hiroki Mikami, Moriyuki Takamura, Sachio Kamiya, Kazuhiko Suzuki, Takahiro Miyajima, Keiji Kimura, Hironori Kasahara
Reducing parallelizing compilation time by removing redundant analysis. SEPS@SPLASH (2016)
Kouhei Yamamoto, Tomoya Shirakawa, Yoshitake Oki, Akimasa Yoshida, Keiji Kimura, Hironori Kasahara
Automatic Local Memory Management for Multicores Having Global Address Space. LCPC (2016)
Bui Duc Binh, Tomohiro Hirano, Hiroki Mikami, Hideo Yamamoto, Keiji Kimura, Hironori Kasahara
Android Video Processing System Combined with Automatically Parallelized and Power Optimized Code by OSCAR Compiler. J. Inf. Process. 24 (3) (2016)
Dan Umeda, Takahiro Suzuki, Hiroki Mikami, Keiji Kimura, Hironori Kasahara
Multigrain Parallelization for Model-Based Design Applications Using the OSCAR Compiler. LCPC (2015)
Mamoru Shimaoka, Yasutaka Wada, Keiji Kimura, Hironori Kasahara
Coarse Grain Task Parallelization of Earthquake Simulator GMS Using OSCAR Compiler on Various Cc-NUMA Servers. LCPC (2015)
Hasan Alkhatib, Paolo Faraboschi, Eitan Frachtenberg, Hironori Kasahara, Danny B. Lange, Phillip A. Laplante, Arif Merchant, Dejan S. Milojicic, Karsten Schwan
What Will 2022 Look Like? The IEEE CS 2022 Report. Computer 48 (3) (2015)
Daichi Fukui, Mamoru Shimaoka, Hiroki Mikami, Dominic Hillenbrand, Hideo Yamamoto, Keiji Kimura, Hironori Kasahara
Annotatable systrace: an extended Linux ftrace for tracing a parallelized program. SEPS@SPLASH (2015)
Makoto Nakayama, Kenichi Yamazaki, Satoshi Tanaka, Hironori Kasahara
Parallelization of tree-to-TLV serialization. IPCCC (2014)
Tomohiro Hirano, Hideo Yamamoto, Shuhei Iizuka, Kohei Muto, Takashi Goto, Tamami Wake, Hiroki Mikami, Moriyuki Takamura, Keiji Kimura, Hironori Kasahara
Evaluation of Automatic Power Reduction with OSCAR Compiler on Intel Haswell and ARM Cortex-A9 Multicores. LCPC (2014)
Dominic Hillenbrand, Akihiro Hayashi, Hideo Yamamoto, Keiji Kimura, Hironori Kasahara
Automatic parallelization, performance predictability and power control for mobile-applications. COOL Chips (2013)
Makoto Nakayama, Kenichi Yamazaki, Satoshi Tanaka, Hironori Kasahara
Dynamic Profiling and Feedback Framework for Reduce-Side Join. CSE (2013)
Dominic Hillenbrand, Yuuki Furuyama, Akihiro Hayashi, Hiroki Mikami, Keiji Kimura, Hironori Kasahara
Reconciling application power control and operating systems for optimal power and performance. ReCoSoC (2013)
Hideo Yamamoto, Tomohiro Hirano, Kohei Muto, Hiroki Mikami, Takashi Goto, Dominic Hillenbrand, Moriyuki Takamura, Keiji Kimura, Hironori Kasahara
OSCAR Compiler Controlled Multicore Power Reduction on Android Platform. LCPC (2013)
Yohei Kanehagi, Dan Umeda, Akihiro Hayashi, Keiji Kimura, Hironori Kasahara
Parallelization of automotive engine control software on embedded multi-core processor using OSCAR compiler. COOL Chips (2013)
Yasir I. M. Al-Dosary, Keiji Kimura, Hironori Kasahara, Seinosuke Narita
Enhancing the performance of a multiplayer game by using a parallelizing compiler. CGAMES (2012)
Yasir I. M. Al-Dosary, Keiji Kimura, Hironori Kasahara, Seinosuke Narita
Enhancing the Performance of a Multiplayer Game by Using a Parallelizing Compiler. Int. J. Intell. Games Simul. 7 (1) (2012)
Hiroki Mikami, Shumpei Kitaki, Masayoshi Mase, Akihiro Hayashi, Mamoru Shimaoka, Keiji Kimura, Masato Edahiro, Hironori Kasahara
Evaluation of Power Consumption at Execution of Multiple Automatically Parallelized and Power Controlled Media Applications on the RP2 Low-Power Multicore. LCPC (2011)
Yasutaka Wada, Akihiro Hayashi, Takeshi Masuura, Jun Shirako, Hirofumi Nakano, Hiroaki Shikano, Keiji Kimura, Hironori Kasahara
A Parallelizing Compiler Cooperative Heterogeneous Multicore Processor Architecture. Trans. High Perform. Embed. Archit. Compil. 4 (2011)
Osamu Nishii, Yoichi Yuyama, Masayuki Ito, Yoshikazu Kiyoshige, Yusuke Nitta, Makoto Ishikawa, Tetsuya Yamada, Junichi Miyakoshi, Yasutaka Wada, Keiji Kimura, Hironori Kasahara, Hideo Maejima
A 45-nm 37.3 GOPS/W Heterogeneous Multi-Core SOC with 16/32 Bit Instruction-Set General-Purpose Core. IEICE Trans. Electron. (4) (2011)
Yoichi Yuyama, Masayuki Ito, Yoshikazu Kiyoshige, Yusuke Nitta, Shigezumi Matsui, Osamu Nishii, Atsushi Hasegawa, Makoto Ishikawa, Tetsuya Yamada, Junichi Miyakoshi, Koichi Terada, Tohru Nojiri, Masashi Satoh, Hiroyuki Mizuno, Kunio Uchiyama, Yasutaka Wada, Keiji Kimura, Hironori Kasahara, Hideo Maejima
A 45nm 37.3GOPS/W heterogeneous multi-core SoC. ISSCC (2010)
Akihiro Hayashi, Yasutaka Wada, Takeshi Watanabe, Takeshi Sekiguchi, Masayoshi Mase, Jun Shirako, Keiji Kimura, Hironori Kasahara
Parallelizing Compiler Framework and API for Power Reduction and Software Productivity of Real-Time Heterogeneous Multicores. LCPC (2010)
Keiji Kimura, Masayoshi Mase, Hiroki Mikami, Takamichi Miyamoto, Jun Shirako, Hironori Kasahara
OSCAR API for Real-Time Low-Power Multicores and Its Performance on Multicores and SMP Servers. LCPC (2009)
Fumiyo Takano, Yoshitaka Maekawa, Hironori Kasahara
Multiple-Paths Search with Concurrent Thread Scheduling for Fast AND/OR Tree Search. CISIS (2009)
Masafumi Onouchi, Keisuke Toyama, Tohru Nojiri, Makoto Sato, Masayoshi Mase, Jun Shirako, Mikiko Sato, Masashi Takada, Masayuki Ito, Hiroyuki Mizuno, Mitaro Namiki, Keiji Kimura, Hironori Kasahara
Green Multicore-SoC Software-Execution Framework with Timely-Power-Gating Scheme. ICPP (2009)
Hiroaki Shikano, Jun Shirako, Yasutaka Wada, Keiji Kimura, Hironori Kasahara
Power-Aware Compiler Controllable Chip Multiprocessor. IEICE Trans. Electron. (4) (2008)
Takamichi Miyamoto, Saori Asaka, Hiroki Mikami, Masayoshi Mase, Yasutaka Wada, Hirofumi Nakano, Keiji Kimura, Hironori Kasahara
Parallelization with Automatic Parallelizing Compiler Generating Consumer Electronics Multicore API. ISPA (2008)
Masayuki Ito, Toshihiro Hattori, Yutaka Yoshida, Kiyoshi Hayase, Tomoichi Hayashi, Osamu Nishii, Yoshihiko Yasu, Atsushi Hasegawa, Masashi Takada, Hiroyuki Mizuno, Kunio Uchiyama, Toshihiko Odaka, Jun Shirako, Masayoshi Mase, Keiji Kimura, Hironori Kasahara
An 8640 MIPS SoC with Independent Power-Off Control of 8 CPUs and 8 RAMs by An Automatic Parallelizing Compiler. ISSCC (2008)
Hiroaki Shikano, Masaki Ito, Kunio Uchiyama, Toshihiko Odaka, Akihiro Hayashi, Takeshi Masuura, Masayoshi Mase, Jun Shirako, Yasutaka Wada, Keiji Kimura, Hironori Kasahara
Software-cooperative power-efficient heterogeneous multi-core for media processing. ASP-DAC (2008)
Hiroaki Shikano, Masaki Ito, Masafumi Onouchi, Takashi Todaka, Takanobu Tsunoda, Tomoyuki Kodama, Kunio Uchiyama, Toshihiko Odaka, Tatsuya Kamei, Ei Nagahama, Manabu Kusaoke, Yusuke Nitta, Yasutaka Wada, Keiji Kimura, Hironori Kasahara
Heterogeneous Multi-Core Architecture That Enables 54x AAC-LC Stereo Encoding. IEEE J. Solid State Circuits 43 (4) (2008)
Jun Shirako, Hironori Kasahara, Vivek Sarkar
Language Extensions in Support of Compiler Parallelization. LCPC (2007)
Yutaka Yoshida, Tatsuya Kamei, Kiyoshi Hayase, Shinichi Shibahara, Osamu Nishii, Toshihiro Hattori, Atsushi Hasegawa, Masashi Takada, Naohiko Irie, Kunio Uchiyama, Toshihiko Odaka, Kiwamu Takada, Keiji Kimura, Hironori Kasahara
A 4320MIPS Four-Processor Core SMP/AMP with Individually Managed Clock Frequency for Low Power Consumption. ISSCC (2007)
Hiroaki Shikano, Jun Shirako, Yasutaka Wada, Keiji Kimura, Hironori Kasahara
Power-Aware Compiler Controllable Chip Multiprocessor. PACT (2007)
Keiji Kimura, Yasutaka Wada, Hirofumi Nakano, Takeshi Kodaka, Jun Shirako, Kazuhisa Ishizaka, Hironori Kasahara
Multigrain parallel processing on compiler cooperative chip multiprocessor. Interaction between Compilers and Computer Architectures (2005)
Jun Shirako, Munehiro Yoshida, Naoto Oshiyama, Yasutaka Wada, Hirofumi Nakano, Hiroaki Shikano, Keiji Kimura, Hironori Kasahara
Performance Evaluation of Compiler Controlled Power Saving Scheme. ISHPC (2005)
Jun Shirako, Naoto Oshiyama, Yasutaka Wada, Hiroaki Shikano, Keiji Kimura, Hironori Kasahara
Compiler Control Power Saving Scheme for Multi Core Processors. LCPC (2005)
Kazuhisa Ishizaka, Takamichi Miyamoto, Jun Shirako, Motoki Obata, Keiji Kimura, Hironori Kasahara
Performance of OSCAR Multigrain Parallelizing Compiler on SMP Servers. LCPC (2004)
Jun Shirako, Kouhei Nagasawa, Kazuhisa Ishizaka, Motoki Obata, Hironori Kasahara
Selective inline expansion for improvement of multi grain parallelism. Parallel and Distributed Computing and Networks (2004)
Kazuhisa Ishizaka, Motoki Obata, Hironori Kasahara
Cache Optimization for Coarse Grain Task Parallel Processing Using Inter-Array Padding. LCPC (2003)
Hirofumi Nakano, Kazuhisa Ishizaka, Motoki Obata, Keiji Kimura, Hironori Kasahara
Static Coarse Grain Task Scheduling with Cache Optimization Using OpenMP. Int. J. Parallel Program. 31 (3) (2003)
Motoki Obata, Jun Shirako, Hiroki Kaminaga, Kazuhisa Ishizaka, Hironori Kasahara
Hierarchical Parallelism Control for Multigrain Parallel Processing. LCPC (2002)
Shuji Hashimoto, Seinosuke Narita, Hironori Kasahara, Katsuhiko Shirai, Atsuo Kobayashi, Atsuo Takanishi, Shigeki Sugano, Jin'ichi Yamaguchi, Hideyuki Sawada, Hideaki Takanobu, Koji Shibuya, Toshio Morita, T. Kurata, Naoyuki Onoe, K. Ouchi, T. Noguchi, Yosihiro Niwa, Seikon Nagayama, Hirokazu Tabayashi, I. Matsui, Motoki Obata, H. Matsuzaki, A. Murasugi, Tetsunori Kobayashi, Satoshi Haruyama, Tetsuhiko Okada, Yasuaki Hidaki, Yuichi Taguchi, Keiichiro Hoashi, Emi Morikawa, Yuri Iwano, D. Araki, J. Suzuki, Masao Yokoyama, I. Dawa, Daisuke Nishino, Sadatoshi Inoue, Tomoshiro Hirano, Eiji Soga, S. Gen, T. Yanada, Keisuke Kato, S. Sakamoto, Y. Ishii, Shigeru Matsuo, Yousuke Yamamoto, Kensuke Sato, T. Hagiwara, T. Ueda, N. Honda, Kazuo Hashimoto, T. Hanamoto, S. Kayaba, Takuya Kojima, Hiroyasu Iwata, H. Kubodera, R. Matsuki, T. Nakajima, K. Nitto, D. Yamamoto, Y. Kamizaki, S. Nagaike, Y. Kunitake, Satoshi Morita
Humanoid Robots in Waseda University-Hadaly-2 and WABIAN. Auton. Robots 12 (1) (2002)
Hirofumi Nakano, Kazuhisa Ishizaka, Motoki Obata, Keiji Kimura, Hironori Kasahara
Static Coarse Grain Task Scheduling with Cache Optimization Using OpenMP. ISHPC (2002)
Hironori Kasahara, Motoki Obata, Kazuhisa Ishizaka, Keiji Kimura, Hiroki Kaminaga, Hirofumi Nakano, Kouhei Nagasawa, Akiko Murai, Hiroki Itagaki, Jun Shirako
Multigrain Automatic Parallelization in Japanese Millennium Project IT21 Advanced Parallelizing Compiler. PARELEC (2002)
Kazuhisa Ishizaka, Motoki Obata, Hironori Kasahara
Coarse Grain Task Parallel Processing with Cache Optimization on Shared Memory Multiprocessor. LCPC (2001)
Hironori Kasahara, Motoki Obata, Kazuhisa Ishizaka
Automatic Coarse Grain Task Parallel Processing on SMP Using OpenMP. LCPC (2000)
Kazuhisa Ishizaka, Motoki Obata, Hironori Kasahara
Coarse-Grain Task Parallel Processing Using the OpenMP Backend of the OSCAR Multigrain Parallelizing Compiler. ISHPC (2000)
Takao Tobita, Masayoshi Kouda, Hironori Kasahara
Performance Evaluation of Minimum Execution Time Multiprocessor Scheduling Algorithms Using Standard Task Graph Set. PDPTA (2000)
Hironori Kasahara, Akimasa Yoshida
A Data-Localization Compilation Scheme Using Partial-Static Task Assignment for Fortran Coarse-Grain Parallel Processing. Parallel Comput. 24 (3-4) (1998)
Kento Aida, Hironori Kasahara, Seinosuke Narita
Job Scheduling Scheme for Pure Space Sharing Among Rigid Jobs. JSSPP (1998)
Akimasa Yoshida, Kenichi Koshizuka, Hironori Kasahara
Data-Localization for Fortran Macro-Dataflow Computation Using Partial Static Task Assignment. International Conference on Supercomputing (1996)
Akimasa Yoshida, Hironori Kasahara
Data Localization Using Loop Aligned Decomposition for Macro-Dataflow Processing. LCPC (1996)
Hironori Kasahara, Atsusi Itoh, Hisamitsu Tanaka, Keisuke Itoh
A parallel optimization algorithm for minimum execution-time multiprocessor scheduling problem. Systems and Computers in Japan 23 (13) (1992)
Hironori Kasahara, Wichian Premchaiswadi, Mikio Tamura, Yoshinori Maekawa, Seinosuke Narita
Parallel Processing of Sparse Matrix Solution Using Fine Grain Tasks on OSCAR. ICPP (3) (1991)
Hiroki Honda, Hironori Kasahara
Coarse grain parallelism detection scheme of a fortran program. Systems and Computers in Japan 22 (12) (1991)
Hiroki Honda, Satoshi Mizuno, Hironori Kasahara, Seinosuke Narita
Parallel processing scheme of a basic block in a fortran program on oscar. Systems and Computers in Japan 22 (11) (1991)
Hironori Kasahara, Hiroki Honda, A. Mogi, A. Ogura, K. Fujiwara, Seinosuke Narita
A Multi-Grain Parallelizing Compilation Scheme for OSCAR (Optimally Scheduled Advanced Multiprocessor). LCPC (1991)
Hironori Kasahara, Hiroki Honda, Seinosuke Narita
Parallel processing of near fine grain tasks using static scheduling OSCAR (optimally scheduled advanced multiprocessor). SC (1990)
Hironori Kasahara, Hiroki Honda, Masahiko Iwata, M. Hirota
A Compilation Scheme for Macro-Dataflow Computation on Hierarchical Multiprocessor Systems. ICPP (2) (1990)
Hironori Kasahara
Parallel processing of robot arm dynamic control computation on multimicroprocessors. Microprocess. Microsystems 14 (1) (1990)
Hironori Kasahara, Masahiko Iwata, Seinosuke Narita, Hirofumi Fujii
Parallel Processing of Robot Dynamics Simulation Using Optimal Multiprocessor Scheduling Algorithms. Systems and Computers in Japan 19 (10) (1988)
Hironori Kasahara, Munenori Kai, Seinosuke Narita, Hidehiko Wada
Application of df/ihs to minimum total weighted flow time multiprocessor scheduling problems. Systems and Computers in Japan 19 (6) (1988)
Hironori Kasahara, Seinosuke Narita
Parallel processing of robot-arm control computation on a multimicroprocessor system. IEEE J. Robotics Autom. 1 (2) (1985)
Hironori Kasahara, Seinosuke Narita
Practical multiprocessor scheduling algorithms for efficient parallel processing. Systems and Computers in Japan 16 (2) (1985)
Hironori Kasahara, Seinosuke Narita
Practical Multiprocessor Scheduling Algorithms for Efficient Parallel Processing. IEEE Trans. Computers 33 (11) (1984)