Munehiro Yoshida

Publication Activity (10 Years)

Years Active: 1996-2005
Publications (10 Years): 0

Publications

Jun Shirako, Munehiro Yoshida, Naoto Oshiyama, Yasutaka Wada, Hirofumi Nakano, Hiroaki Shikano, Keiji Kimura, Hironori Kasahara
Performance Evaluation of Compiler Controlled Power Saving Scheme. ISHPC (2005)
Toshiaki Kirihata, Hing Wong, John K. DeBrosse, Yohji Watanabe, Takahiko Hara, Munehiro Yoshida, Matthew R. Wordeman, Shuso Fujii, Yoshiaki Asao, Bo Krsnik
Flexible test mode approach for 256-Mb DRAM. IEEE J. Solid State Circuits 32 (10) (1997)
Yohji Watanabe, Ring Wong, Toshiaki Kirihata, Daisuke Kato, John K. DeBrosse, Takahiko Rara, Munehiro Yoshida, Rideo Mukai, Khandker N. Quader, Takeshi Nagai, Peter Poechmueller, Peter Pfefferl, Matthew R. Wordeman, Shuso Fujii
256 Mb DRAM with ×32 both-ends DQ. IEEE J. Solid State Circuits 31 (4) (1996)
Toshiaki Kirihata, Yohji Watanabe, Hing Wong, John K. DeBrosse, Munehiro Yoshida, Daisuke Kato, Shuso Fujii, Matthew R. Wordeman, Peter Poechmueller, Stephen A. Parke, Yoshiaki Asao
Fault-tolerant designs for 256 Mb DRAM. IEEE J. Solid State Circuits 31 (4) (1996)