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Fault-tolerant designs for 256 Mb DRAM.

Toshiaki KirihataYohji WatanabeHing WongJohn K. DeBrosseMunehiro YoshidaDaisuke KatoShuso FujiiMatthew R. WordemanPeter PoechmuellerStephen A. ParkeYoshiaki Asao
Published in: IEEE J. Solid State Circuits (1996)
Keyphrases
  • fault tolerant
  • fault tolerance
  • distributed systems
  • main memory
  • high density
  • load balancing
  • state machine
  • data structure
  • high availability
  • multi dimensional
  • low voltage
  • dynamic random access memory