A 45-nm 37.3 GOPS/W Heterogeneous Multi-Core SOC with 16/32 Bit Instruction-Set General-Purpose Core.
Osamu NishiiYoichi YuyamaMasayuki ItoYoshikazu KiyoshigeYusuke NittaMakoto IshikawaTetsuya YamadaJunichi MiyakoshiYasutaka WadaKeiji KimuraHironori KasaharaHideo MaejimaPublished in: IEICE Trans. Electron. (2011)