Hideo Maejima

Publication Activity (10 Years)

Years Active: 1983-2011
Publications (10 Years): 0

Publications

Osamu Nishii, Yoichi Yuyama, Masayuki Ito, Yoshikazu Kiyoshige, Yusuke Nitta, Makoto Ishikawa, Tetsuya Yamada, Junichi Miyakoshi, Yasutaka Wada, Keiji Kimura, Hironori Kasahara, Hideo Maejima
A 45-nm 37.3 GOPS/W Heterogeneous Multi-Core SOC with 16/32 Bit Instruction-Set General-Purpose Core. IEICE Trans. Electron. (4) (2011)
Yoichi Yuyama, Masayuki Ito, Yoshikazu Kiyoshige, Yusuke Nitta, Shigezumi Matsui, Osamu Nishii, Atsushi Hasegawa, Makoto Ishikawa, Tetsuya Yamada, Junichi Miyakoshi, Koichi Terada, Tohru Nojiri, Masashi Satoh, Hiroyuki Mizuno, Kunio Uchiyama, Yasutaka Wada, Keiji Kimura, Hironori Kasahara, Hideo Maejima
A 45nm 37.3GOPS/W heterogeneous multi-core SoC. ISSCC (2010)
Yoshitaka Arahori, Katsuhiko Gondow, Hideo Maejima
TCBC: Trap Caching Bounds Checking for C. DASC (2009)
Tohru Nojiri, Yuki Kondo, Naohiko Irie, Masayuki Ito, Hajime Sasaki, Hideo Maejima
Domain Partitioning Technology for Embedded Multicore Processors. IEEE Micro 29 (6) (2009)
Nobuyasu Kanekawa, Hideo Maejima, Hatsuhiko Kato, Hirokazu Ihara
Fault-tolerant computer system with stepwise negotiating voting. Systems and Computers in Japan 22 (2) (1991)
Hideo Maejima, Tadaaki Bandoh, Yoji Nishio, Tadashi Fukushima, Masanori Odaka, Atsuo Hotta
Circuit technologies for BiCMOS VLSI's as computer elements. ICCD (1989)
Nobuyasu Kanekawa, Hideo Maejima, Hatsuhiko Kato, Hirokazu Ihara
Dependable onboard computer systems with a new method-stepwise negotiating voting. FTCS (1989)
Hideo Maejima, Hiroyuki Kida, Tan Watanabe, Shiro Baba, Keiichi Kurakazu
A 16-Bit Microprocessor with Multi-Register Bank Architecture. FJCC (1986)
Hideo Maejima, Koyo Katsura, Hideo Nakamura, Toshimasa Kihara
The VLSI Control Structure of a CMOS Microcomputer. IEEE Micro 3 (6) (1983)