Hiroki Honda

Publication Activity (10 Years)

Years Active: 1990-2024
Publications (10 Years): 11

Top Topics

Multiplicative Noise

Received Signal

Maximum Likelihood Estimator

Region Detection

Top Venues

IEICE Trans. Inf. Syst.

Publications

Kohei Yoshida, Shinobu Miwa, Hayato Yamaki, Hiroki Honda
Analyzing the impact of CUDA versions on GPU applications. Parallel Comput. 120 (2024)
Chenlin Shi, Shinobu Miwa, Tongxin Yang, Ryota Shioya, Hayato Yamaki, Hiroki Honda
CNFET7: An Open Source Cell Library for 7-nm CNFET Technology. ASP-DAC (2023)
Kohei Yoshida, Rio Sageyama, Shinobu Miwa, Hayato Yamaki, Hiroki Honda
Analyzing Performance and Power-Efficiency Variations among NVIDIA GPUs. ICPP (2022)
Hiroki Honda, Kazunori Hayashi, Gurusanthosh Pabbisetty, Hiroki Mori
Received Signal Power based Sensor Zone Estimation with Maximum Likelihood Approach. APSIPA ASC (2021)
Kyosuke Tanaka, Hayato Yamaki, Shinobu Miwa, Hiroki Honda
Evaluating architecture-level optimization in packet processing caches. Comput. Networks 181 (2020)
Shinobu Miwa, Masaya Ishihara, Hayato Yamaki, Hiroki Honda, Martin Schulz
Footprint-Based DIMM Hotplug. IEEE Trans. Computers 69 (2) (2020)
Hayato Yamaki, Hiroaki Nishi, Shinobu Miwa, Hiroki Honda
RPC: An Approach for Reducing Compulsory Misses in Packet Processing Cache. IEICE Trans. Inf. Syst. (12) (2020)
Kazunori Hayashi, Ayano Nakai-Kasai, Atsuya Hirayama, Hiroki Honda, Tetsuya Sasaki, Hideki Yasukawa, Ryo Hayakawa
An Overloaded IoT Signal Detection Method using Non-convex Sparse Regularizers. APSIPA (2020)
Kyosuke Tanaka, Hayato Yamaki, Shinobu Miwa, Hiroki Honda
Multi-Level Packet Processing Caches. COOL CHIPS (2019)
Hayato Yamaki, Hiroaki Nishi, Shinobu Miwa, Hiroki Honda
Data prediction for response flows in packet processing cache. DAC (2018)
Momoka Ohba, Satoshi Shindo, Shinobu Miwa, Tomoaki Tsumura, Hayato Yamaki, Hiroki Honda
Initial Study of Reconfigurable Neural Network Accelerators. CANDAR (2016)
Takefumi Miyoshi, Hidetsugu Irie, Keigo Shima, Hiroki Honda, Masaaki Kondo, Tsutomu Yoshinaga
FLAT: a GPU programming framework to provide embedded MPI. GPGPU@ASPLOS (2012)
Satoshi Ohshima, Shoichi Hirasawa, Hiroki Honda
OMPCUDA : OpenMP Execution Framework for CUDA Based on Omni OpenMP Compiler. IWOMP (2010)
Reiji Suda, Takayuki Aoki, Shoichi Hirasawa, Akira Nukada, Hiroki Honda, Satoshi Matsuoka
Aspects of GPU for general purpose high performance computing. ASP-DAC (2009)
Shoichi Hirasawa, Yu Nakanishi, Hiromasa Watanabe, Hiroki Honda
Common Description Language of SIMD Instructions for Performance Portability. PDPTA (2008)
Hiromasa Watanabe, Shoichi Hirasawa, Hiroki Honda
F-Omega: A Framework for Steering GridRPC Applications. eScience (2007)
Makoto Ishihara, Hiroki Honda, Mitsuhisa Sato
Development and Implementation of an Interactive Parallelization Assistance Tool for OpenMP: iPat/OMP. IEICE Trans. Inf. Syst. (2) (2006)
Takahiro Katagiri, Kenji Kise, Hiroki Honda, Toshitsugu Yuba
ABCLib_DRSSED: A parallel eigensolver with an auto-tuning facility. Parallel Comput. 32 (3) (2006)
Takahiro Katagiri, Kenji Kise, Hiroki Honda, Toshitsugu Yuba
ABCLibScript: a directive to support specification of an auto-tuning facility for numerical software. Parallel Comput. 32 (1) (2006)
H. Tanabe, Hiroki Honda, Toshitsugu Yuba
Macro-Dataflow using Software Distributed Shared Memory. CLUSTER (2005)
Sanya Tangpongprasit, Takahiro Katagiri, Kenji Kise, Hiroki Honda, Toshitsugu Yuba
A time-to-live based reservation algorithm on fully decentralized resource discovery in Grid computing. Parallel Comput. 31 (6) (2005)
Kenji Kise, Takahiro Katagiri, Hiroki Honda, Toshitsugu Yuba
Evaluation of the Acknowledgment Reduction in a Software-DSM System. PPAM (2005)
Kenji Kise, Takahiro Katagiri, Hiroki Honda, Toshitsugu Yuba
The SimCore/Alpha Functional Simulator. WCAE (2004)
Takahiro Katagiri, Kenji Kise, Hiroki Honda, Toshitsugu Yuba
Effect of auto-tuning with user's knowledge for numerical software. Conf. Computing Frontiers (2004)
Kenji Kise, Hiroki Honda, Toshitsugu Yuba
SimAlpha Version 1.0: Simple and Readable Alpha Processor Simulator. Asia-Pacific Computer Systems Architecture Conference (2003)
Ryo Takata, Kenji Kise, Hiroki Honda, Toshitsugu Yuba
DEM-1: A Particle Simulation Machine for Efficient Short-Range Interaction Computations. IPDPS (2002)
Hideaki Hirayama, Hiroki Honda, Toshitsugu Yuba
Distributed shared memory with log based consistency for operations with commutative law or associative law. Systems and Computers in Japan 32 (8) (2001)
Hideaki Hirayama, Hiroki Honda, Toshitsugu Yuba
Scalable Data Mining with Log Based Consistency DSM for High Performance Distributed Computing. ICECCS (2000)
Hideaki Hirayama, Hiroki Honda, Toshitsugu Yuba
Distributed Shared Memory with Log Based Consistency for Scalable Data Mining. COMPSAC (1999)
Hirotoshi Sato, Tomohisa Wada, Shigeki Ohbayashi, Kunihiko Kozaru, Yasuyuki Okamoto, Yoshiko Higashide, Tadayuki Shimizu, Yukio Maki, Rui Morimoto, Hisakazu Otoi, Tsuyoshi Koga, Hiroki Honda, Makoto Taniguchi, Yutaka Arita, Toru Shiomi
A 500-MHz pipelined burst SRAM with improved SER immunity. IEEE J. Solid State Circuits 34 (11) (1999)
Motoyasu Takabatake, Hiroki Honda, Toshitsugu Yuba
Performance Measurements on Sandglass-Type Parallelization of Doacross Loops. HPCN Europe (1999)
Hirofumi Yamashita, Michio Sasaki, Shinji Ohsawa, Ryohei Miyagawa, Eiji Ohba, Keiji Mabuchi, Nobuo Nakamura, Nagataka Tanaka, Nahoko Endoh, Ikuko Inoue, Yoshiyuki Matsunaga, Yoshitaka Egawa, Yukio Endo, Tetsuya Yamaguchi, Yoshinori Iida, Akihiko Furukawa, Sohei Manabe, Yoshiki Ishizuka, Hideo Ichinose, Takako Niiyama, Hisanori Ihara, Hidetoshi Nozaki, Isamu Yanase, Naoshi Sakuma, Takeo Sakakubo, Hiroki Honda, Fujio Masuoka, Okio Yoshida, Hiroyuki Tango, Shun-ichi Sano
A 2/3-in 2 million pixel STACK-CCD HDTV imager. IEEE J. Solid State Circuits 30 (8) (1995)
Hiroki Honda, Hironori Kasahara
Coarse grain parallelism detection scheme of a fortran program. Systems and Computers in Japan 22 (12) (1991)
Hiroki Honda, Satoshi Mizuno, Hironori Kasahara, Seinosuke Narita
Parallel processing scheme of a basic block in a fortran program on oscar. Systems and Computers in Japan 22 (11) (1991)
Hironori Kasahara, Hiroki Honda, A. Mogi, A. Ogura, K. Fujiwara, Seinosuke Narita
A Multi-Grain Parallelizing Compilation Scheme for OSCAR (Optimally Scheduled Advanced Multiprocessor). LCPC (1991)
Hironori Kasahara, Hiroki Honda, Seinosuke Narita
Parallel processing of near fine grain tasks using static scheduling OSCAR (optimally scheduled advanced multiprocessor). SC (1990)
Hironori Kasahara, Hiroki Honda, Masahiko Iwata, M. Hirota
A Compilation Scheme for Macro-Dataflow Computation on Hierarchical Multiprocessor Systems. ICPP (2) (1990)