Login / Signup

A 500-MHz pipelined burst SRAM with improved SER immunity.

Hirotoshi SatoTomohisa WadaShigeki OhbayashiKunihiko KozaruYasuyuki OkamotoYoshiko HigashideTadayuki ShimizuYukio MakiRui MorimotoHisakazu OtoiTsuyoshi KogaHiroki HondaMakoto TaniguchiYutaka AritaToru Shiomi
Published in: IEEE J. Solid State Circuits (1999)
Keyphrases
  • power consumption
  • improved algorithm
  • databases
  • neural network
  • high frequency