Performance and Energy Efficient Hardware-Based Scheduler for Symmetric/Asymmetric CMPs.
Nikola MarkovicDaniel NemirovskyOsman S. UnsalMateo ValeroAdrián CristalPublished in: SBAC-PAD (2015)
Keyphrases
- energy efficient
- multi core architecture
- wireless sensor networks
- energy consumption
- sensor networks
- low cost
- data aggregation
- energy efficiency
- base station
- real time
- digital signal processor
- multi core processors
- multi hop
- routing protocol
- data dissemination
- resource manager
- data gathering
- data transmission
- hardware architecture
- resource utilization
- massively parallel
- data sets
- scheduling algorithm
- data acquisition
- hardware implementation
- embedded systems
- routing algorithm
- sensor nodes
- cluster head
- computer systems
- data collection
- data management
- mobile devices
- database systems