Miquel Moretó

ORCID

Publication Activity (10 Years)

Years Active: 2006-2024
Publications (10 Years): 97

Top Venues

Publications

Lorién López-Villellas, Rubén Langarita-Benítez, Asaf Badouh, Víctor Soria Pardos, Quim Aguado-Puig, Guillem López-Paradís, Max Doblas, Javier Setoain, Chulho Kim, Makoto Ono, Adrià Armejach, Santiago Marco-Sola, Jesús Alastruey-Benedé, Pablo Ibáñez, Miquel Moretó
GenArchBench: A genomics benchmark suite for arm HPC processors. Future Gener. Comput. Syst. 157 (2024)
Pouya Esmaili-Dokht, Francesco Sgherzi, Valéria Soldera Girelli, Isaac Boixaderas, Mariana Carmin, Alireza Momeni, Adrià Armejach, Estanislao Mercadal, Germán Llort, Petar Radojkovic, Miquel Moretó, Judit Giménez, Xavier Martorell, Eduard Ayguadé, Jesús Labarta, Emanuele Confalonieri, Rishabh Dubey, Jason Adlard
A Mess of Memory System Benchmarking, Simulation and Application Profiling. CoRR (2024)
Vatistas Kostalabros, Jordi Ribes-González, Oriol Farràs, Miquel Moretó, Carles Hernández
A Safety-Critical, RISC-V SoC Integrated and ASIC-Ready Classic McEliece Accelerator. ARC (2024)
Gerardo Bandera, Javier Salamero, Miquel Moretó, Julio Villalba
Floating Point HUB Adder for RISC-V Sargantana Processor. CoRR (2024)
Mahdi Nikdast, Miquel Moretó, Masoumeh Ebrahimi, Sujay Deb
Special Issue on the 2023 International Symposium on Networks-on-Chip (NOCS 2023). IEEE Des. Test 40 (6) (2023)
Lorién López-Villellas, Carl Christian Kjelgaard Mikkelsen, Juan José Galano-Frutos, Santiago Marco-Sola, Jesús Alastruey-Benedé, Pablo Ibáñez, Miquel Moretó, Javier Sancho, Pablo García-Risueño
Accurate and efficient constrained molecular dynamics of polymers using Newton's method and special purpose code. Comput. Phys. Commun. 288 (2023)
Guillem López-Paradís, Balaji Venu, Adrià Armejach, Miquel Moretó
Characterization of a Coherent Hardware Accelerator Framework for SoCs. SAMOS (2023)
Abbas Haghi, Lluc Alvarez, Jordi Front, Juan Miguel De Haro Ruiz, Roger Figueras, Max Doblas, Santiago Marco-Sola, Miquel Moretó
WFAsic: A High-Performance ASIC Accelerator for DNA Sequence Alignment on a RISC-V SoC. ICPP (2023)
Max Doblas, Oscar Lostes-Cazorla, Quim Aguado-Puig, Nick Cebry, Pau Fontova-Musté, Christopher Frances Batten, Santiago Marco-Sola, Miquel Moretó
GMX: Instruction Set Extensions for Fast, Scalable, and Efficient Genome Sequence Alignment. MICRO (2023)
Santiago Marco-Sola, Jordan M. Eizenga, Andrea Guarracino, Benedict Paten, Erik Garrison, Miquel Moretó
) space. Bioinform. 39 (2) (2023)
Lorién López-Villellas, Esteve Pineda-Sánchez, Asaf Badouh, Santiago Marco-Sola, Pablo Ibáñez, Jesús Alastruey-Benedé, Miquel Moretó
RISC-V for Genome Data Analysis: Opportunities and Challenges. DCIS (2023)
Víctor Soria Pardos, Adrià Armejach, Tiago Mück, Darío Suárez Gracia, José A. Joao, Alejandro Rico, Miquel Moretó
DynAMO: Improving Parallelism Through Dynamic Placement of Atomic Memory Operations. ISCA (2023)
Quim Aguado-Puig, Max Doblas, Christos Matzoros, Antonio Espinosa, Juan Carlos Moure, Santiago Marco-Sola, Miquel Moretó
WFA-GPU: gap-affine pairwise read-alignment using GPUs. Bioinform. 39 (12) (2023)
Víctor Jiménez, Mario Rodríguez, Marc Domínguez, Josep Sans, Ivan Diaz, Luca Valente, Vito Luca Guglielmi, Josue V. Quiroga, R. Ignacio Genovese, Nehir Sönmez, Oscar Palomar, Miquel Moretó
Functional Verification of a RISC-V Vector Accelerator. IEEE Des. Test 40 (3) (2023)
Max Doblas, Gerard Candón, Xavier Carril, Marc Domínguez, Enric Erra, Alberto González, César Hernández, Víctor Jiménez, Vatistas Kostalampros, Rubén Langarita, Neiel Leyva, Guillem López-Paradís, Jonnatan Mendoza, Josep Oltra, Julián Pavón, Cristóbal Ramírez, Narcís Rodas, Enrico Reggiani, Mario Rodríguez, Carlos Rojas, Abraham Ruiz, Hugo Safadi, Víctor Soria, Alejandro Suanes, Iván Vargas, Fernando Arreza, Roger Figueras, Pau Fontova-Musté, Joan Marimon, Ricardo Martínez, Sergio Moreno, Jordi Sacristán, Oscar Alonso, Xavier Aragonès, Adrián Cristal, Ángel Diéguez, Manuel López, Diego Mateo, Francesc Moll, Miquel Moretó, Oscar Palomar, Marco A. Ramírez, Francesc Serra-Graells, Nehir Sönmez, Lluís Terés, Osman S. Unsal, Mateo Valero, Luis Villa
Sargantana: An Academic SoC RISC-V Processor in 22nm FDSOI Technology. DCIS (2023)
Francesco Sgherzi, Marco Siracusa, Ivan Fernandez, Adrià Armejach, Miquel Moretó
SpChar: Characterizing the Sparse Puzzle via Decision Trees. CoRR (2023)
Abbas Haghi, Santiago Marco-Sola, Lluc Alvarez, Dionysios Diamantopoulos, Christoph Hagleitner, Miquel Moretó
WFA-FPGA: An efficient accelerator of the wavefront algorithm for short and long read genomics alignment. Future Gener. Comput. Syst. 149 (2023)
Rubén Langarita, Adrià Armejach, Pablo Ibáñez, Jesús Alastruey-Benedé, Miquel Moretó
Porting and Optimizing BWA-MEM2 Using the Fujitsu A64FX Processor. IEEE ACM Trans. Comput. Biol. Bioinform. 20 (5) (2023)
Enrico Reggiani, Alessandro Pappalardo, Max Doblas, Miquel Moretó, Mauro Olivieri, Osman Sabri Unsal, Adrián Cristal
Mix-GEMM: An efficient HW-SW Architecture for Mixed-Precision Quantized Deep Neural Networks Inference on Edge Devices. HPCA (2023)
Cristobal Ortega, Lluc Alvarez, Alper Buyuktosunoglu, Ramon Bertran, Todd Rosedahl, Pradip Bose, Miquel Moretó
Adaptive Power Shifting for Power-Constrained Heterogeneous Systems. IEEE Trans. Computers 72 (3) (2023)
Neiel Leyva, Alireza Monemi, Noelia Oliete-Escuín, Guillem López-Paradís, Xabier Abancens, Jonathan Balkind, Enrique Vallejo, Miquel Moretó, Lluc Alvarez
OpenPiton Optimizations Towards High Performance Manycores. NoCArc@MICRO (2023)
Guillem López-Paradís, Brian Li, Adrià Armejach, Stefan Wallentowitz, Miquel Moretó, Jonathan Balkind
Fast Behavioural RTL Simulation of 10B Transistor SoC Designs with Metro-Mpi. DATE (2023)
Tim Hotfilter, Fabian Kreß, Fabian Kempf, Jürgen Becker, Juan Miguel De Haro Ruiz, Daniel Jiménez-González, Miquel Moretó, Carlos Álvarez, Jesús Labarta, Imen Baili
Towards Reconfigurable Accelerators in HPC: Designing a Multipurpose eFPGA Tile for Heterogeneous SoCs. DATE (2022)
Quim Aguado-Puig, Santiago Marco-Sola, Juan Carlos Moure, David Castells-Rufas, Lluc Alvarez, Antonio Espinosa, Miquel Moretó
Accelerating Edit-Distance Sequence Alignment on GPU Using the Wavefront Algorithm. IEEE Access 10 (2022)
Juan M. Cebrian, Thibaud Balem, Adrián Barredo, Marc Casas, Miquel Moretó, Alberto Ros, Alexandra Jimborean
Compiler-Assisted Compaction/Restoration of SIMD Instructions. IEEE Trans. Parallel Distributed Syst. 33 (4) (2022)
Jordi Ribes-González, Oriol Farràs, Carles Hernández, Vatistas Kostalabros, Miquel Moretó
A Security Model for Randomization-based Protected Caches. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2022 (3) (2022)
Víctor Soria Pardos, Max Doblas, Guillem López-Paradís, Gerard Candón, Narcís Rodas, Xavier Carril, Pau Fontova-Musté, Neiel Leyva, Santiago Marco-Sola, Miquel Moretó
Sargantana: A 1 GHz+ In-Order RISC-V Processor with SIMD Vector Extensions in 22nm FD-SOI. DSD (2022)
Jordi Ribes-González, Oriol Farràs, Carles Hernández, Vatistas Kostalabros, Miquel Moretó
A Security Model for Randomization-based Protected Caches. IACR Cryptol. ePrint Arch. 2022 (2022)
Guillem Cabo, Gerard Candón, Xavier Carril, Max Doblas, Marc Domínguez, Alberto González, César Hernández, Víctor Jiménez, Vatistas Kostalampros, Rubén Langarita, Neiel Leyva, Guillem López-Paradís, Jonnatan Mendoza, Francesco Minervini, Julián Pavón, Cristóbal Ramírez, Narcís Rodas, Enrico Reggiani, Mario Rodríguez, Carlos Rojas, Abraham Ruiz, Víctor Soria, Alejandro Suanes, Iván Vargas, Roger Figueras, Pau Fontova, Joan Marimon, Víctor Montabes, Adrián Cristal, Carles Hernández, Ricardo Martínez, Miquel Moretó, Francesc Moll, Oscar Palomar, Marco A. Ramírez, Antonio Rubio, Jordi Sacristán, Francesc Serra-Graells, Nehir Sönmez, Lluís Terés, Osman Unsal, Mateo Valero, Luís Villa
DVINO: A RISC-V Vector Processor Implemented in 65nm Technology. DCIS (2022)
Paul Caheny, Lluc Alvarez, Marc Casas, Miquel Moretó
TD-NUCA: Runtime Driven Management of NUCA Caches in Task Dataflow Programming Models. SC (2022)
Rubén Langarita, Adrià Armejach, Javier Setoain, Pablo Ibáñez-Marín, Jesús Alastruey-Benedé, Miquel Moretó
Compressed Sparse FM-Index: Fast Sequence Alignment Using Large K-Steps. IEEE ACM Trans. Comput. Biol. Bioinform. 19 (1) (2022)
Adrià Armejach, Bine Brank, Jordi Cortina, François Dolique, Timothy Hayes, Nam Ho, Pierre-Axel Lagadec, Romain Lemaire, Guillem López-Paradís, Laurent Marliac, Miquel Moretó, Pedro Marcuello, Dirk Pleiter, Xubin Tan, Said Derradji
Mont-Blanc 2020: Towards Scalable and Power Efficient European HPC Processors. DATE (2021)
Guillem López-Paradís, Adrià Armejach, Miquel Moretó
gem5 + rtl: A Framework to Enable RTL Models Inside a Full-System Simulator. ICPP (2021)
David Castells-Rufas, Santiago Marco-Sola, Quim Aguado-Puig, Antonio Espinosa-Morales, Juan Carlos Moure, Lluc Alvarez, Miquel Moretó
OpenCL-based FPGA Accelerator for Semi-Global Approximate String Matching Using Diagonal Bit-Vectors. FPL (2021)
Víctor Soria Pardos, Adrià Armejach, Darío Suárez Gracia, Miquel Moretó
On the use of many-core Marvell ThunderX2 processor for HPC workloads. J. Supercomput. 77 (4) (2021)
Vatistas Kostalabros, Jordi Ribes-González, Oriol Farràs, Miquel Moretó, Carles Hernández
HLS-Based HW/SW Co-Design of the Post-Quantum Classic McEliece Cryptosystem. FPL (2021)
Guillem Cabo, Francisco Bas, Ruben Lorenzo, David Trilla, Sergi Alcaide, Miquel Moretó, Carles Hernández, Jaume Abella
SafeSU: an Extended Statistics Unit for Multicore Timing Interference. ETS (2021)
Vladimir Dimic, Miquel Moretó, Marc Casas, Mateo Valero
PrioRAT: Criticality-Driven Prioritization Inside the On-Chip Memory Hierarchy. Euro-Par (2021)
Abbas Haghi, Santiago Marco-Sola, Lluc Alvarez, Dionysios Diamantopoulos, Christoph Hagleitner, Miquel Moretó
An FPGA Accelerator of the Wavefront Algorithm for Genomics Pairwise Alignment. FPL (2021)
Cristobal Ortega, Lluc Alvarez, Marc Casas, Ramon Bertran, Alper Buyuktosunoglu, Alexandre E. Eichenberger, Pradip Bose, Miquel Moretó
Intelligent Adaptation of Hardware Knobs for Improving Performance and Power Consumption. IEEE Trans. Computers 70 (1) (2021)
Adrián Barredo, Adrià Armejach, Jonathan C. Beard, Miquel Moretó
PLANAR: a programmable accelerator for near-memory data rearrangement. ICS (2021)
Alireza Monemi, Iván Pérez, Neiel Leyva, Enrique Vallejo, Ramón Beivide, Miquel Moretó
PIugSMART: a pluggable open-source module to implement multihop bypass in networks-on-chip. NOCS (2021)
Julian Pavon, Iván Vargas Valdivieso, Adrián Barredo, Joan Marimon, Miquel Moretó, Francesc Moll, Osman S. Unsal, Mateo Valero, Adrián Cristal
VIA: A Smart Scratchpad for Vector Units with Application to Sparse Matrix Computations. HPCA (2021)
Adrián Barredo, Juan M. Cebrian, Mateo Valero, Marc Casas, Miquel Moretó
Efficiency analysis of modern vector architectures: vector ALU sizes, core counts and clock frequencies. J. Supercomput. 76 (3) (2020)
Jaume Abella, Calvin Bulla, Guillem Cabo, Francisco J. Cazorla, Adrián Cristal, Max Doblas, Roger Figueras, Alberto González, Carles Hernández, César Hernández, Víctor Jiménez, Leonidas Kosmidis, Vatistas Kostalabros, Rubén Langarita, Neiel Leyva, Guillem López-Paradís, Joan Marimon, Ricardo Martínez, Jonnatan Mendoza, Francesc Moll, Miquel Moretó, Julián Pavón, Cristóbal Ramírez, Marco Antonio Ramírez, Carlos Rojas Morales, Antonio Rubio, Abraham Ruiz, Nehir Sönmez, Víctor Soria, Lluís Terés, Osman S. Unsal, Mateo Valero, Iván Vargas Valdivieso, Luis Villa
An Academic RISC-V Silicon Implementation Based on Open-Source Components. DCIS (2020)
Isaac Sánchez Barrera, David Black-Schaffer, Marc Casas, Miquel Moretó, Anastasiia Stupnikova, Mihail Popov
Modeling and optimizing NUMA effects and prefetching with machine learning. ICS (2020)
Vladimir Dimic, Miquel Moretó, Marc Casas, Jan Ciesko, Mateo Valero
RICH: implementing reductions in the cache hierarchy. ICS (2020)
Adrián Barredo, Juan M. Cebrian, Miquel Moretó, Marc Casas, Mateo Valero
Improving Predication Efficiency through Compaction/Restoration of SIMD Instructions. HPCA (2020)
Juan M. Cebrian, Adrián Barredo, Helena Caminal, Miquel Moretó, Marc Casas, Mateo Valero
Semi-automatic validation of cycle-accurate simulation infrastructures: The case for gem5-x86. Future Gener. Comput. Syst. 112 (2020)
Abbas Haghi, Lluc Alvarez, Jordà Polo, Dionysios Diamantopoulos, Christoph Hagleitner, Miquel Moretó
A Hardware/Software Co-Design of K-mer Counting Using a CAPI-Enabled FPGA. FPL (2020)
Luc Jaulmes, Miquel Moretó, Mateo Valero, Mattan Erez, Marc Casas
Runtime-guided ECC protection using online estimation of memory vulnerability. SC (2020)
Ivan Perez, Enrique Vallejo, Miquel Moretó, Ramón Beivide
BST: A BookSim-Based Toolset to Simulate NoCs with Single- and Multi-Hop Bypass. ISPASS (2020)
Adrià Armejach, Helena Caminal, Juan M. Cebrian, Rubén Langarita, Rekai González-Alberquilla, Chris Adeniyi-Jones, Mateo Valero, Marc Casas, Miquel Moretó
Using Arm's scalable vector extension on stencil codes. J. Supercomput. 76 (3) (2020)
Michele Cancilla, Laura Canalini, Federico Bolelli, Stefano Allegretti, Salvador Carrión, Roberto Paredes, Jon Ander Gómez, Simone Leo, Marco Enrico Piras, Luca Pireddu, Asaf Badouh, Santiago Marco-Sola, Lluc Alvarez, Miquel Moretó, Costantino Grana
The DeepHealth Toolkit: A Unified Framework to Boost Biomedical Applications. ICPR (2020)
Dimitrios Chasapis, Miquel Moretó, Martin Schulz, Barry Rountree, Mateo Valero, Marc Casas
Power efficient job scheduling by predicting the impact of processor manufacturing variability. ICS (2019)
Adrián Barredo, Juan M. Cebrian, Miquel Moretó, Marc Casas, Mateo Valero
POSTER: An Optimized Predication Execution for SIMD Extensions. PACT (2019)
Adrià Armejach, Marc Casas, Miquel Moretó
Design trade-offs for emerging HPC processors based on mobile market technology. J. Supercomput. 75 (9) (2019)
Kallia Chronaki, Miquel Moretó, Marc Casas, Alejandro Rico, Rosa M. Badia, Eduard Ayguadé, Mateo Valero
On the maturity of parallel applications for asymmetric multi-core processors. J. Parallel Distributed Comput. 127 (2019)
Fabrizio Gagliardi, Miquel Moretó, Mauro Olivieri, Mateo Valero
The international race towards Exascale in Europe. CCF Trans. High Perform. Comput. 1 (1) (2019)
Alejandro Rico, Isaac Sánchez Barrera, José A. Joao, Joshua Randall, Marc Casas, Miquel Moretó
On the Benefits of Tasking with OpenMP. IWOMP (2019)
Neiel I. Leyva-Santes, Ivan Perez, César-Alejandro Hernández-Calderón, Enrique Vallejo, Miquel Moretó, Ramón Beivide, Marco Antonio Ramírez Salinas, Luis A. Villa-Vargas
Lagarto I RISC-V Multi-core: Research Challenges to Build and Integrate a Network-on-Chip. ISUM (2019)
Emilio Castillo, Nikhil Jain, Marc Casas, Miquel Moretó, Martin Schulz, Ramón Beivide, Mateo Valero, Abhinav Bhatele
Optimizing computation-communication overlap in asynchronous task-based programs: poster. PPoPP (2019)
Emilio Castillo, Nikhil Jain, Marc Casas, Miquel Moretó, Martin Schulz, Ramón Beivide, Mateo Valero, Abhinav Bhatele
Optimizing computation-communication overlap in asynchronous task-based programs. ICS (2019)
Adrián Barredo, Jonathan C. Beard, Miquel Moretó
POSTER: SPiDRE: Accelerating Sparse Memory Access Patterns. PACT (2019)
Luc Jaulmes, Miquel Moretó, Mateo Valero, Marc Casas
A Vulnerability Factor for ECC-protected Memory. IOLTS (2019)
Constantino Gómez, Francesc Martínez, Adrià Armejach, Miquel Moretó, Filippo Mantovani, Marc Casas
Design Space Exploration of Next-Generation HPC Machines. IPDPS (2019)
Thomas Grass, Trevor E. Carlson, Alejandro Rico, Germán Ceballos, Eduard Ayguadé, Marc Casas, Miquel Moretó
Sampled Simulation of Task-Based Programs. IEEE Trans. Computers 68 (2) (2019)
Paul Caheny, Lluc Alvarez, Mateo Valero, Miquel Moretó, Marc Casas
Runtime-assisted cache coherence deactivation in task parallel programs. SC (2018)
Cristobal Ortega, Victor Garcia, Miquel Moretó, Marc Casas, Roxana Rusitoru
Data Prefetching on In-order Processors. HPCS (2018)
Lluc Alvarez, Marc Casas, Jesús Labarta, Eduard Ayguadé, Mateo Valero, Miquel Moretó
Runtime-Guided Management of Stacked DRAM Memories in Task Parallel Programs. ICS (2018)
Emilio Castillo, Lluc Alvarez, Miquel Moretó, Marc Casas, Enrique Vallejo, José Luis Bosque, Ramón Beivide, Mateo Valero
Architectural Support for Task Dependence Management with Flexible Software Scheduling. HPCA (2018)
Calvin Bulla, Lluc Alvarez, Miquel Moretó, Ramon Bertran, Alper Buyuktosunoglu, Pradip Bose
ChopStiX: Systematic Extraction of Code-Representative Microbenchmarks. IISWC (2018)
Adrià Armejach, Helena Caminal, Juan M. Cebrian, Rekai González-Alberquilla, Chris Adeniyi-Jones, Mateo Valero, Marc Casas, Miquel Moretó
Stencil codes on a vector length agnostic architecture. PACT (2018)
Helena Caminal, Diego Caballero, Juan M. Cebrian, Roger Ferrer, Marc Casas, Miquel Moretó, Xavier Martorell, Mateo Valero
Performance and energy effects on task-based parallelized applications - User-directed versus manual vectorization. J. Supercomput. 74 (6) (2018)
Paul Caheny, Lluc Alvarez, Said Derradji, Mateo Valero, Miquel Moretó, Marc Casas
Reducing Cache Coherence Traffic with a NUMA-Aware Runtime Approach. IEEE Trans. Parallel Distributed Syst. 29 (5) (2018)
Isaac Sánchez Barrera, Marc Casas, Miquel Moretó, Eduard Ayguadé, Jesús Labarta, Mateo Valero
Graph partitioning applied to DAG scheduling to reduce NUMA effects. PPOPP (2018)
Luc Jaulmes, Miquel Moretó, Eduard Ayguadé, Jesús Labarta, Mateo Valero, Marc Casas
Asynchronous and Exact Forward Recovery for Detected Errors in Iterative Solvers. IEEE Trans. Parallel Distributed Syst. 29 (9) (2018)
Isaac Sánchez Barrera, Miquel Moretó, Eduard Ayguadé, Jesús Labarta, Mateo Valero, Marc Casas
Reducing Data Movement on Large Shared Memory Systems by Exploiting Computation Dependencies. ICS (2018)
Luc Jaulmes, Miquel Moretó, Mateo Valero, Marc Casas
Memory Vulnerability: A Case for Delaying Error Reporting. CoRR (2018)
Kallia Chronaki, Marc Casas, Miquel Moretó, Jaume Bosch, Rosa M. Badia
TaskGenX: A Hardware-Software Proposal for Accelerating Task Parallelism. ISC (2018)
Vladimir Dimic, Miquel Moretó, Marc Casas, Mateo Valero
Runtime-Assisted Shared Cache Insertion Policies Based on Re-reference Intervals. Euro-Par (2017)
Qixiao Liu, Miquel Moretó, Jaume Abella, Francisco J. Cazorla, Mateo Valero
SEDEA: A Sensible Approach to Account DRAM Energy in Multicore Systems. SBAC-PAD (2017)
Ilia Pietri, Sicong Zhuang, Marc Casas, Miquel Moretó, Rizos Sakellariou
Evaluating Scientific Workflow Execution on an Asymmetric Multicore Processor. Euro-Par Workshops (2017)
Kallia Chronaki, Alejandro Rico, Marc Casas, Miquel Moretó, Rosa M. Badia, Eduard Ayguadé, Jesús Labarta, Mateo Valero
Task Scheduling Techniques for Asymmetric Multi-Core Systems. IEEE Trans. Parallel Distributed Syst. 28 (7) (2017)
Iulian Brumar, Marc Casas, Miquel Moretó, Mateo Valero, Gurindar S. Sohi
ATM: Approximate Task Memoization in the Runtime System. IPDPS (2017)
Cristobal Ortega, Miquel Moretó, Marc Casas, Ramon Bertran, Alper Buyuktosunoglu, Alexandre E. Eichenberger, Pradip Bose
libPRISM: an intelligent adaptation of prefetch and SMT levels. ICS (2017)
Damian Roca, Daniel Nemirovsky, Marc Casas, Miquel Moretó, Mateo Valero, Mario Nemirovsky
iQ: An Efficient and Flexible Queue-Based Simulation Framework. MASCOTS (2017)
Kallia Chronaki, Miquel Moretó, Marc Casas, Alejandro Rico, Rosa M. Badia, Eduard Ayguadé, Jesús Labarta, Mateo Valero
POSTER: Exploiting Asymmetric Multi-Core Processors with Flexible System Sofware. PACT (2016)
Thomas Grass, Alejandro Rico, Marc Casas, Miquel Moretó, Eduard Ayguadé
TaskPoint: Sampled simulation of task-based programs. ISPASS (2016)
Dimitrios Chasapis, Marc Casas, Miquel Moretó, Raul Vidal, Eduard Ayguadé, Jesús Labarta, Mateo Valero
PARSECSs: Evaluating the Impact of Task Parallelism in the PARSEC Benchmark Suite. ACM Trans. Archit. Code Optim. 12 (4) (2016)
Paul Caheny, Marc Casas, Miquel Moretó, Hervé Gloaguen, Maxime Saintes, Eduard Ayguadé, Jesús Labarta, Mateo Valero
Reducing Cache Coherence Traffic with Hierarchical Directory Cache and NUMA-Aware Runtime Scheduling. PACT (2016)
Emilio Castillo, Miquel Moretó, Marc Casas, Lluc Alvarez, Enrique Vallejo, Kallia Chronaki, Rosa M. Badia, José Luis Bosque, Ramón Beivide, Eduard Ayguadé, Jesús Labarta, Mateo Valero
CATA: Criticality Aware Task Acceleration for Multicore Processors. IPDPS (2016)
Qixiao Liu, Miquel Moretó, Jaume Abella, Francisco J. Cazorla, Mateo Valero
DReAM: An Approach to Estimate per-Task DRAM Energy in Multicore Systems. ACM Trans. Design Autom. Electr. Syst. 22 (1) (2016)
Qixiao Liu, Miquel Moretó, Jaume Abella, Francisco J. Cazorla, Daniel A. Jiménez, Mateo Valero
Sensible Energy Accounting with Abstract Metering for Multicore Systems. ACM Trans. Archit. Code Optim. 12 (4) (2016)
Petar Radojkovic, Paul M. Carpenter, Miquel Moretó, Vladimir Cakarevic, Javier Verdú, Alex Pajuelo, Francisco J. Cazorla, Mario Nemirovsky, Mateo Valero
Thread Assignment in Multicore/Multithreaded Processors: A Statistical Approach. IEEE Trans. Computers 65 (1) (2016)
Thomas Grass, César Allande, Adrià Armejach, Alejandro Rico, Eduard Ayguadé, Jesús Labarta, Mateo Valero, Marc Casas, Miquel Moretó
MUSA: a multi-level simulation approach for next-generation HPC machines. SC (2016)
Dimitrios Chasapis, Marc Casas, Miquel Moretó, Martin Schulz, Eduard Ayguadé, Jesús Labarta, Mateo Valero
Runtime-Guided Mitigation of Manufacturing Variability in Power-Constrained Multi-Socket NUMA Nodes. ICS (2016)
Raul Vidal, Marc Casas, Miquel Moretó, Dimitrios Chasapis, Roger Ferrer, Xavier Martorell, Eduard Ayguadé, Jesús Labarta, Mateo Valero
Evaluating the Impact of OpenMP 4.0 Extensions on Relevant Parallel Workloads. IWOMP (2015)
Marc Casas, Miquel Moretó, Lluc Alvarez, Emilio Castillo, Dimitrios Chasapis, Timothy Hayes, Luc Jaulmes, Oscar Palomar, Osman S. Unsal, Adrián Cristal, Eduard Ayguadé, Jesús Labarta, Mateo Valero
Runtime-Aware Architectures. Euro-Par (2015)
Lluc Alvarez, Miquel Moretó, Marc Casas, Emilio Castillo, Xavier Martorell, Jesús Labarta, Eduard Ayguadé, Mateo Valero
Runtime-Guided Management of Scratchpad Memories in Multicore Architectures. PACT (2015)

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Publication Activity (10 Years)

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Miquel Moretó