Pablo Ibáñez

Publication Activity (10 Years)

Years Active: 1996-2024
Publications (10 Years): 19

Top Topics

Multicore Processors

Bandwidth Allocation

Abstraction Levels

Learning Situations

Top Venues

J. Parallel Distributed Comput.

J. Supercomput.

Publications

Roberto Rodríguez-Rodríguez, Javier Díaz, Fernando Castro, Pablo Ibáñez, Daniel Chaver, Víctor Viñals, Juan Carlos Saez, Manuel Prieto-Matias, Luis Pinuel, Teresa Monreal, José María Llabería
Reuse Detector: Improving the Management of STT-RAM SLLCs. CoRR (2024)
Lorién López-Villellas, Carl Christian Kjelgaard Mikkelsen, Juan José Galano-Frutos, Santiago Marco-Sola, Jesús Alastruey-Benedé, Pablo Ibáñez, Miquel Moretó, Javier Sancho, Pablo García-Risueño
Accurate and efficient constrained molecular dynamics of polymers using Newton's method and special purpose code. Comput. Phys. Commun. 288 (2023)
Carlos Escuin, Asif Ali Khan, Pablo Ibáñez, Teresa Monreal, Jerónimo Castrillón, Víctor Viñals
Compression-Aware and Performance-Efficient Insertion Policies for Long-Lasting Hybrid LLCs. HPCA (2023)
Agustín Navarro-Torres, Jesús Alastruey-Benedé, Pablo Ibáñez, Víctor Viñals Yúfera
BALANCER: bandwidth allocation and cache partitioning for multicore processors. J. Supercomput. 79 (9) (2023)
Lorién López-Villellas, Esteve Pineda-Sánchez, Asaf Badouh, Santiago Marco-Sola, Pablo Ibáñez, Jesús Alastruey-Benedé, Miquel Moretó
RISC-V for Genome Data Analysis: Opportunities and Challenges. DCIS (2023)
Rubén Langarita, Adrià Armejach, Pablo Ibáñez, Jesús Alastruey-Benedé, Miquel Moretó
Porting and Optimizing BWA-MEM2 Using the Fujitsu A64FX Processor. IEEE ACM Trans. Comput. Biol. Bioinform. 20 (5) (2023)
Carlos Escuin, Fernando García-Redondo, Mahdi Zahedi, Pablo Ibáñez, Teresa Monreal, Víctor Viñals, José María Llabería, James Myers, Julien Ryckaert, Dwaipayan Biswas, Francky Catthoor
MNEMOSENE++: Scalable Multi-Tile Design with Enhanced Buffering and VGSOT-MRAM based Compute-in-Memory Crossbar Array. ICECS (2023)
Carlos Escuin, Pablo Ibáñez, Teresa Monreal, José M. Llabería, Víctor Viñals
L2C2: Last-Level Compressed-Cache NVM and a Procedure to Forecast Performance and Lifetime. CoRR (2022)
Carlos Escuin, Pablo Ibáñez, Teresa Monreal, José M. Llabería, Víctor Viñals
Forecasting lifetime and performance of a novel NVM last-level cache with compression. CoRR (2022)
Carlos Escuin, Asif Ali Khan, Pablo Ibáñez, Teresa Monreal, Víctor Viñals, Jerónimo Castrillón
HyCSim: A rapid design space exploration tool for emerging hybrid last-level caches. DroneSE/RAPIDO@HiPEAC (2022)
Agustín Navarro-Torres, Biswabandan Panda, Jesús Alastruey-Benedé, Pablo Ibáñez, Víctor Viñals Yúfera, Alberto Ros
Berti: an Accurate Local-Delta Data Prefetcher. MICRO (2022)
Javier Díaz, Pablo Ibáñez, Teresa Monreal, Víctor Viñals, José M. Llabería
Near-optimal replacement policies for shared caches in multicore processors. J. Supercomput. 77 (10) (2021)
Alejandro Valero, Ruben Gran Tejero, Darío Suárez Gracia, Emanuel A. Georgescu, Joaquín Ezpeleta, Pedro Álvarez, Adolfo Muñoz, Luis M. Ramos, Pablo Ibáñez
A learning experience toward the understanding of abstraction-level interactions in parallel applications. J. Parallel Distributed Comput. 156 (2021)
Marcelo Bruno, Pablo Ibáñez, Tamara Techera, Daniel Calegari, Gustavo Betarte
Exploring the Application of Process Mining Techniques to Improve Web Application Security. CLEI (2021)
Jose Manuel Herruzo, Sonia González-Navarro, Pablo Ibáñez, Víctor Viñals, Jesús Alastruey-Benedé, Oscar G. Plata
Boosting Backward Search Throughput for FM-Index Using a Compressed Encoding. DCC (2019)
Javier Díaz, Teresa Monreal, Pablo Ibáñez, José M. Llabería, Víctor Viñals
ReD: A reuse detector for content selection in exclusive shared last-level caches. J. Parallel Distributed Comput. 125 (2019)
Alejandro Valero, Darío Suárez Gracia, Ruben Gran Tejero, Luis M. Ramos, Agustín Navarro-Torres, Adolfo Muñoz, Joaquín Ezpeleta, José Luis Briz, Ana C. Murillo, Eduardo Montijano, Javier Resano, María Villarroya-Gaudó, Jesús Alastruey-Benedé, Enrique F. Torres, Pedro Álvarez, Pablo Ibáñez, Víctor Viñals
Exposing Abstraction-Level Interactions with a Parallel Ray Tracer. WCAE@ISCA (2019)
Roberto Rodríguez-Rodríguez, Javier Díaz, Fernando Castro, Pablo Ibáñez, Daniel Chaver, Víctor Viñals, Juan Carlos Saez, Manuel Prieto-Matías, Luis Piñuel, Teresa Monreal Arnal, José María Llabería
Reuse Detector: Improving the Management of STT-RAM SLLCs. Comput. J. 61 (6) (2018)
Alexandra Ferrerón-Labari, Darío Suárez Gracia, Jesús Alastruey-Benedé, Teresa Monreal Arnal, Pablo Ibáñez
Concertina: Squeezing in Cache Content to Operate at Near-Threshold Voltage. IEEE Trans. Computers 65 (3) (2016)
Jorge Albericio, Pablo Ibáñez, Víctor Viñals, José María Llabería
Exploiting reuse locality on inclusive shared last-level caches. ACM Trans. Archit. Code Optim. 9 (4) (2013)
Jorge Albericio, Pablo Ibáñez, Víctor Viñals, José M. Llabería
The reuse cache: downsizing the shared last-level cache. MICRO (2013)
Jorge Albericio, Ruben Gran Tejero, Pablo Ibáñez, Víctor Viñals, José María Llabería
ABS: A low-cost adaptive controller for prefetching in a banked shared last-level cache. ACM Trans. Archit. Code Optim. 8 (4) (2012)
Benjamin Sahelices, Agustín De Dios Hernández, Pablo Ibáñez, Víctor Viñals Yúfera, José María Llabería
Effcient Handling of Lock Hand-off in DSM Multiprocessors with Buffering Coherence Controllers. J. Comput. Sci. Technol. 27 (1) (2012)
Ana Bosque, Víctor Viñals, Pablo Ibáñez, José María Llabería
Filtering Directory Lookups in CMPs with Write-Through Caches. Euro-Par (1) (2011)
Ana Bosque, Víctor Viñals, Pablo Ibáñez, José M. Llabería
Filtering directory lookups in CMPs. Microprocess. Microsystems 35 (8) (2011)
Ana Bosque, Víctor Viñals, Pablo Ibáñez, José M. Llabería
Filtering Directory Lookups in CMPs. DSD (2010)
Benjamin Sahelices, Pablo Ibáñez, Víctor Viñals, José María Llabería
A Methodology to Characterize Critical Section Bottlenecks in DSM Multiprocessors. Euro-Par (2009)
Enrique F. Torres, Pablo Ibáñez, Víctor Viñals Yúfera, José María Llabería
Store Buffer Design for Multibanked Data Caches. IEEE Trans. Computers 58 (10) (2009)
Ana Bosque, Pablo Ibáñez, Víctor Viñals, Per Stenström, José María Llabería
Characterization of Apache web server with Specweb2005. MEDEA@PACT (2007)
Agustín De Dios Hernández, Benjamín Sahelices Fernández, Pablo Ibáñez, Víctor Viñals, José M. Llabería
Speeding-Up Synchronizations in DSM Multiprocessors. Euro-Par (2006)
Jesús Alastruey, José Luis Briz, Pablo Ibáñez, Víctor Viñals
Software Demand, Hardware Supply. IEEE Micro 26 (4) (2006)
Enrique F. Torres, Pablo Ibáñez, Víctor Viñals, José María Llabería
Store Buffer Design in First-Level Multibanked Data Caches. ISCA (2005)
Enrique F. Torres, Pablo Ibáñez, Víctor Viñals, José María Llabería
Contents Management in First-Level Multibanked Data Caches. Euro-Par (2004)
Enrique F. Torres, Pablo Ibáñez, Víctor Viñals, José María Llabería
Counteracting Bank Misprediction in Sliced First-Level Caches. Euro-Par (2003)
Pablo Ibáñez, Víctor Viñals, José Luis Briz, María Jesús Garzarán
Characterization and Improvement of Load/Store Cache-based Prefetching. International Conference on Supercomputing (1998)
Pablo Ibáñez, Víctor Viñals
Performance Assessment of Contents Management in Multilevel On-Chip Caches. EUROMICRO (1996)