Teresa Monreal Arnal

Publication Activity (10 Years)

Years Active: 1997-2019
Publications (10 Years): 3

Top Topics

Energy Consumption

Cache Consistency

Embedded Processors

Top Venues

IEEE Trans. Computers

IEEE Trans. Very Large Scale Integr. Syst.

J. Parallel Distributed Comput.

Publications

Alexandra Ferrerón-Labari, Jesús Alastruey-Benedé, Darío Suárez Gracia, Teresa Monreal Arnal, Pablo Ibáñez-Marín, Víctor Viñals Yúfera
A fault-tolerant last level cache for CMPs operating at ultra-low voltage. J. Parallel Distributed Comput. 125 (2019)
Roberto Rodríguez-Rodríguez, Javier Díaz, Fernando Castro, Pablo Ibáñez, Daniel Chaver, Víctor Viñals, Juan Carlos Saez, Manuel Prieto-Matías, Luis Piñuel, Teresa Monreal Arnal, José María Llabería
Reuse Detector: Improving the Management of STT-RAM SLLCs. Comput. J. 61 (6) (2018)
Alexandra Ferrerón-Labari, Darío Suárez Gracia, Jesús Alastruey-Benedé, Teresa Monreal Arnal, Pablo Ibáñez
Concertina: Squeezing in Cache Content to Operate at Near-Threshold Voltage. IEEE Trans. Computers 65 (3) (2016)
Alexandra Ferrerón-Labari, Darío Suárez Gracia, Jesús Alastruey-Benedé, Teresa Monreal Arnal, Víctor Viñals
Block Disabling Characterization and Improvements in CMPs Operating at Ultra-low Voltages. SBAC-PAD (2014)
Darío Suárez Gracia, Alexandra Ferrerón-Labari, Luis Montesano Del Campo, Teresa Monreal Arnal, Víctor Viñals Yúfera
Revisiting LP-NUCA Energy Consumption: Cache Access Policies and Adaptive Block Dropping. ACM Trans. Archit. Code Optim. 11 (2) (2014)
Darío Suárez Gracia, Giorgos Dimitrakopoulos, Teresa Monreal Arnal, Manolis Katevenis, Víctor Viñals Yúfera
LP-NUCA: Networks-in-Cache for High-Performance Low-Power Embedded Processors. IEEE Trans. Very Large Scale Integr. Syst. 20 (8) (2012)
Antonio González, Mateo Valero, José González, Teresa Monreal Arnal
Virtual registers. HiPC (1997)