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A fault-tolerant last level cache for CMPs operating at ultra-low voltage.

Alexandra Ferrerón-LabariJesús Alastruey-BenedéDarío Suárez GraciaTeresa Monreal ArnalPablo Ibáñez-MarínVíctor Viñals Yúfera
Published in: J. Parallel Distributed Comput. (2019)
Keyphrases
  • fault tolerant
  • low voltage
  • fault tolerance
  • distributed systems
  • load balancing
  • power line
  • high speed
  • design considerations
  • state machine
  • main memory
  • query processing
  • energy consumption
  • message passing