Manolis Katevenis

Publication Activity (10 Years)

Years Active: 1987-2024
Publications (10 Years): 16

Top Topics

Energy Efficient

Design Space Exploration

Convolutional Neural Networks

Systematic Evaluation

Top Venues

Publications

Michalis Gianioudis, Pantelis Xirouchakis, Charisios Loukas, Evangelos Mageiropoulos, Orestis Mousouros, Sokratis Mpartzis, Aggelos Ioannou, Vassilis Papaefstathiou, Manolis Katevenis, Nikolaos Chrysos
Low-latency Communication in RISC-V Clusters. HPC Asia (2024)
Manolis Ploumidis, Fabien Chaix, Nikolaos Chrysos, Marios Asiminakis, Vassilis Flouris, Nikolaos D. Kallimanis, Nikolaos Kossifidis, Michael Nikoloudakis, Polydoros Petrakis, Nikolaos Dimou, Michalis Gianioudis, Georgios Ieronymakis, Aggelos Ioannou, George Kalokerinos, Pantelis Xirouchakis, Georgios Ailamakis, Astrinos Damianakis, Michael Ligerakis, Ioannis Makris, Theocharis Vavouris, Manolis Katevenis, Vassilis Papaefstathiou, Manolis Marazakis, Iakovos Mavroidis
The ExaNeSt Prototype: Evaluation of Efficient HPC Communication Hardware in an ARM-based Multi-FPGA Rack. CoRR (2023)
Antonis Psistakis, Nikos Chrysos, Fabien Chaix, Marios Asiminakis, Michalis Gianioudis, Pantelis Xirouchakis, Vassilis Papaefstathiou, Manolis Katevenis
Optimized Page Fault Handling During RDMA. IEEE Trans. Parallel Distributed Syst. 33 (10) (2022)
Andrea Biagioni, Paolo Cretaro, Ottorino Frezza, Francesca Lo Cicero, Alessandro Lonardo, Michele Martinelli, Pier Stanislao Paolucci, Elena Pastorelli, Francesco Simula, Matteo Turisini, Piero Vicini, Roberto Ammendola, Pascale Bernier-Bruna, Claire Chen, Said Derradji, Stéphane Guez, Pierre-Axel Lagadec, Gregoire Pichon, Etienne Walter, Gaetan De Gassowski, Matthieu Hautreaux, Stephane Mathieu, Gilles Moreau, Marc Pérache, Hugo Taboada, Torsten Hoefler, Timo Schneider, Matteo Barnaba, Giuseppe Piero Brandino, Francesco De Giorgi, Matteo Poggi, Iakovos Mavroidis, Yannis Papaefstathiou, Nikolaos Tampouratzis, Benjamin Kalisch, Ulrich Krackhardt, Mondrian Nuessle, Pantelis Xirouchakis, Vangelis Mageiropoulos, Michalis Gianioudis, Harisis Loukas, Aggelos Ioannou, Nikos Kallimanis, Nikos Chrysos, Manolis Katevenis, Wolfang Frings, Dominik Gottwald, Felime Guimaraes, Max Holicki, Volker Marx, Yannik Muller, Carsten Clauss, Hugo Falter, Xu Huang, Jennifer Lopez Barillao, Thomas Moschny, Simon Pickartz, Francisco J. Alfaro, Jesús Escudero-Sahuquillo, Pedro Javier García, Francisco J. Quiles, José L. Sánchez, Adrián Castelló, Jose Duro, María Engracia Gómez, Enrique Quintana, Julio Sahuquillo, Eugenio Stabile
RED-SEA: Network Solution for Exascale Architectures. DSD (2022)
Evangelos Mageiropoulos, Nikolaos Chrysos, Nikolaos Dimou, Manolis Katevenis
Using hls4ml to Map Convolutional Neural Networks on Interconnected FPGA Devices. FCCM (2021)
Antonis Psistakis, Nikos Chrysos, Fabien Chaix, Marios Asiminakis, Michalis Giannioudis, Pantelis Xirouchakis, Vassilis Papaefstathiou, Manolis Katevenis
PART: Pinning Avoidance in RDMA Technologies. NOCS (2020)
Giuliano Taffoni, Manolis Katevenis, Renato Panchieri, Gino Perna, Luca Tornatore, David Goz, Antonio Ragagnin, Sara Bertocco, Igor Coretti, Manolis Marazakis, Fabien Chaix, Manolis Ploumidis
Towards Exascale: Measuring the Energy Footprint of Astrophysics HPC Simulations. eScience (2019)
Manolis Ploumidis, Nikolaos D. Kallimanis, Marios Asiminakis, Nikos Chrysos, Pantelis Xirouchakis, Michalis Gianoudis, Leandros Tzanakis, Nikolaos Dimou, Antonis Psistakis, Panagiotis Peristerakis, Giorgos Kalokairinos, Vassilis Papaefstathiou, Manolis Katevenis
Software and Hardware Co-design for Low-Power HPC Platforms. ISC Workshops (2019)
Fabien Chaix, Georgios Ailamakis, Theocharis Vavouris, Astrinos Damianakis, Manolis Katevenis, Iakovos Mavroidis, Aggelos Ioannou, Nikolaos Kossifidis, Nikolaos Dimou, Giorgos Ieronymakis, Manolis Marazakis, Vassilis Papaefstathiou, Vassilis Flouris, Mihailis Ligerakis
Implementation and Impact of an Ultra-Compact Multi-FPGA Board for Large System Prototyping. H2RC@SC (2019)
Giuliano Taffoni, Giuseppe Murante, Luca Tornatore, David Goz, Stefano Borgani, Manolis Katevenis, Nikolaos Chrysos, Manolis Marazakis
Shall numerical astrophysics step into the era of Exascale computing? CoRR (2019)
George Kalokerinos, Vassilis Papaefstathiou, George Nikiforos, Stamatis G. Kavadias, Xiaojun Yang, Dionisios N. Pnevmatikatos, Manolis Katevenis
Prototyping a Configurable Cache/Scratchpad Memory with Virtualized User-Level RDMA Capability. Trans. High Perform. Embed. Archit. Compil. 5 (2019)
Dimitris Giannopoulos, Nikos Chrysos, Evangelos Mageiropoulos, Giannis Vardas, Leandros Tzanakis, Manolis Katevenis
Accurate Congestion Control for RDMA Transfers. NOCS (2018)
Manolis Katevenis, Roberto Ammendola, Andrea Biagioni, Paolo Cretaro, Ottorino Frezza, Francesca Lo Cicero, Alessandro Lonardo, Michele Martinelli, Pier Stanislao Paolucci, Elena Pastorelli, Francesco Simula, Piero Vicini, Giuliano Taffoni, Jose Antonio Pascual, Javier Navaridas, Mikel Luján, John Goodacre, Bernd Lietzow, Martin L. Kersten
Next generation of Exascale-class systems: ExaNeSt project and the status of its interconnect and storage development. Microprocess. Microsystems 61 (2018)
Roberto Ammendola, Andrea Biagioni, Paolo Cretaro, Ottorino Frezza, Francesca Lo Cicero, Alessandro Lonardo, Michele Martinelli, Pier Stanislao Paolucci, Elena Pastorelli, Francesco Simula, Piero Vicini, Giuliano Taffoni, Jose Antonio Pascual, Javier Navaridas, Mikel Luján, John Goodacre, Nikolaos Chrysos, Manolis Katevenis
The Next Generation of Exascale-Class Systems: The ExaNeSt Project. DSD (2017)
Nikolaos Chrysos, Lydia Y. Chen, Christoforos Kachris, Manolis Katevenis
Discharging the Network From Its Flow Control Headaches: Packet Drops and HOL Blocking. IEEE/ACM Trans. Netw. 24 (1) (2016)
Manolis Katevenis, Nikolaos Chrysos, Manolis Marazakis, Iakovos Mavroidis, Fabien Chaix, Nikolaos D. Kallimanis, Javier Navaridas, John Goodacre, Piero Vicini, Andrea Biagioni, Pier Stanislao Paolucci, Alessandro Lonardo, Elena Pastorelli, Francesca Lo Cicero, Roberto Ammendola, P. Hopton, P. Coates, Giuliano Taffoni, S. Cozzini, Martin L. Kersten, Y. Zhang, Julio Sahuquillo, Sergio Lechago, C. Pinto, Bernd Lietzow, D. Everett, Gino Perna
The ExaNeSt Project: Interconnects, Storage, and Packaging for Exascale Systems. DSD (2016)
Giorgos Passas, Manolis Katevenis, Dionisios N. Pnevmatikatos
The Combined Input-Output Queued Crossbar Architecture for High-Radix On-Chip Switches. IEEE Micro 35 (6) (2015)
Antonis Psathakis, Vassilis Papaefstathiou, Nikolaos Chrysos, Fabien Chaix, Evangelos Vasilakis, Dionisios N. Pnevmatikatos, Manolis Katevenis
A Systematic Evaluation of Emerging Mesh-like CMP NoCs. ANCS (2015)
Antonis Psathakis, Vassilis Papaefstathiou, Manolis Katevenis, Dionisios N. Pnevmatikatos
Design trade-offs in energy efficient NoC architectures. NOCS (2014)
Spyros Lyberis, George Kalokerinos, Michalis Lygerakis, Vassilis Papaefstathiou, Iakovos Mavroidis, Manolis Katevenis, Dionisios N. Pnevmatikatos, Dimitrios S. Nikolopoulos
FPGA prototyping of emerging manycore architectures for parallel programming research using Formic boards. J. Syst. Archit. 60 (6) (2014)
Yves Durand, Paul M. Carpenter, Stefano Adami, Angelos Bilas, Denis Dutoit, Alexis Farcy, Georgi Gaydadjiev, John Goodacre, Manolis Katevenis, Manolis Marazakis, Emil Matús, Iakovos Mavroidis, John Thomson
EUROSERVER: Energy Efficient Node for European Micro-Servers. DSD (2014)
Antonis Psathakis, Vassilis Papaefstathiou, Manolis Katevenis, Dionisios N. Pnevmatikatos
Design space exploration for fair resource-allocated NoC architectures. ICSAMOS (2014)
Christoforos Kachris, George Nikiforos, Vassilis Papaefstathiou, Stamatis G. Kavadias, Manolis Katevenis
NP-SARC: Scalable network processing in the SARC multi-core FPGA platform. J. Syst. Archit. 59 (1) (2013)
Vassilis Papaefstathiou, Manolis Katevenis, Dimitrios S. Nikolopoulos, Dionisios N. Pnevmatikatos
Prefetching and cache management using task lifetimes. ICS (2013)
Spyros Lyberis, George Kalokerinos, Michalis Lygerakis, Vassilis Papaefstathiou, Dimitrios Tsaliagkos, Manolis Katevenis, Dionisios N. Pnevmatikatos, Dimitrios S. Nikolopoulos
Formic: Cost-efficient and Scalable Prototyping of Manycore Architectures. FCCM (2012)
Darío Suárez Gracia, Giorgos Dimitrakopoulos, Teresa Monreal Arnal, Manolis Katevenis, Víctor Viñals Yúfera
LP-NUCA: Networks-in-Cache for High-Performance Low-Power Embedded Processors. IEEE Trans. Very Large Scale Integr. Syst. 20 (8) (2012)
Stamatis G. Kavadias, Manolis Katevenis, Michail Zampetakis, Dimitrios S. Nikolopoulos
Cache-Integrated Network Interfaces: Flexible On-Chip Communication and Synchronization for Large-Scale CMPs. Int. J. Parallel Program. 40 (6) (2012)
Giorgos Passas, Manolis Katevenis, Dionisios N. Pnevmatikatos
Crossbar NoCs Are Scalable Beyond 100 Nodes. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31 (4) (2012)
Yanping Gao, Christoforos Kachris, Manolis Katevenis
An efficient sequential iterative matching algorithm for CIOQ switches. ISCC (2011)
Pranav Tendulkar, Vassilis Papaefstathiou, George Nikiforos, Stamatis G. Kavadias, Dimitrios S. Nikolopoulos, Manolis Katevenis
Fine-grain OpenMP runtime support with explicit communication hardware primitives. DATE (2011)
Giorgos Passas, Manolis Katevenis, Dionisios N. Pnevmatikatos
VLSI micro-architectures for high-radix crossbar schedulers. NOCS (2011)
Nikolaos Chrysos, Manolis Katevenis
Distributed WFQ scheduling converging to weighted max-min fairness. Comput. Networks 55 (3) (2011)
Xiaojun Yang, Christoforos Kachris, Manolis Katevenis
Efficient implementation of CIOQ switches with sequential iterative matching algorithms. FPT (2010)
Stamatis G. Kavadias, Manolis Katevenis, Michail Zampetakis, Dimitrios S. Nikolopoulos
On-chip communication and synchronization mechanisms with cache-integrated network interfaces. Conf. Computing Frontiers (2010)
Giorgos Passas, Manolis Katevenis, Dionisios N. Pnevmatikatos
A 128 x 128 x 24Gb/s Crossbar Interconnecting 128 Tiles in a Single Hop and Occupying 6% of Their Area. NOCS (2010)
Nikolaos Chrysos, Lydia Y. Chen, Cyriel Minkenberg, Christoforos Kachris, Manolis Katevenis
End-to-end congestion management for non-blocking multi-stage switching fabrics. ANCS (2010)
Christoforos Kachris, George Nikiforos, Stamatis G. Kavadias, Vassilis Papaefstathiou, Manolis Katevenis
Network Processing in Multi-core FPGAs with Integrated Cache-Network Interface. ReConFig (2010)
Manolis Katevenis, Vassilis Papaefstathiou, Stamatis G. Kavadias, Dionisios N. Pnevmatikatos, Federico Silla, Dimitrios S. Nikolopoulos
Explicit Communication and Synchronization in SARC. IEEE Micro 30 (5) (2010)
George Kalokerinos, Vassilis Papaefstathiou, George Nikiforos, Stamatis G. Kavadias, Manolis Katevenis, Dionisios N. Pnevmatikatos, Xiaojun Yang
FPGA implementation of a configurable cache/scratchpad memory with virtualized user-level RDMA capability. ICSAMOS (2009)
Dimitrios Simos, Ioannis Papaefstathiou, Manolis Katevenis
Building an FoC Using Large, Buffered Crossbar Cores. IEEE Des. Test Comput. 25 (6) (2008)
Manolis Katevenis
Towards unified mechanisms for inter-processor communication. ICSAMOS (2008)
George Michelogiannakis, Dionisios N. Pnevmatikatos, Manolis Katevenis
Approaching Ideal NoC Latency with Pre-Configured Routes. NOCS (2007)
Aggelos Ioannou, Manolis Katevenis
Pipelined heap (priority queue) management for advanced scheduling in high-speed networks. IEEE/ACM Trans. Netw. 15 (2) (2007)
Vassilis Papaefstathiou, Dionisios N. Pnevmatikatos, Manolis Marazakis, Giorgos Kalokairinos, Aggelos Ioannou, Michael Papamichael, Stamatis G. Kavadias, Giorgos Mihelogiannakis, Manolis Katevenis
Prototyping Efficient Interprocessor Communication Mechanisms. ICSAMOS (2007)
Nikolaos Chrysos, Manolis Katevenis
Scheduling in Non-Blocking Buffered Three-Stage Switching Fabrics. INFOCOM (2006)
Manolis Katevenis, Giorgos Passas
Variable-size multipacket segments in buffered crossbar (CICQ) architectures. ICC (2005)
Georgios Sapountzis, Manolis Katevenis
Benes switching fabrics with O(N)-complexity internal backpressure. IEEE Commun. Mag. 43 (1) (2005)
Nikolaos Chrysos, Manolis Katevenis
Scheduling in switches with small internal buffers. GLOBECOM (2005)
Manolis Katevenis, Giorgos Passas, Dimitrios Simos, Ioannis Papaefstathiou, Nikolaos Chrysos
Variable packet size buffered crossbar (CICQ) switches. ICC (2004)
Nikolaos Chrysos, Manolis Katevenis
Multiple priorities in a two-lane buffered crossbar. GLOBECOM (2004)
Evangelos P. Markatos, Dionisios N. Pnevmatikatos, Michail Flouris, Manolis Katevenis
Web-conscious storage management for web proxies. IEEE/ACM Trans. Netw. 10 (6) (2002)
Manolis Katevenis, Iakovos Mavroidis, Georgios Sapountzis, Evangelia Kalyvianaki, Ioannis Mavroidis, Georgios Glykopoulos
Wormhole IP over (connectionless) ATM. IEEE/ACM Trans. Netw. 9 (5) (2001)
Aggelos Nikologiannis, Manolis Katevenis
Efficient per-flow queueing in DRAM at OC-192 line rate using out-of-order execution techniques. ICC (2001)
Aggelos Ioannou, Manolis Katevenis
Pipelined heap (priority queue) management for advanced scheduling in high-speed networks. ICC (2001)
Evangelos P. Markatos, Manolis Katevenis, Dionisios N. Pnevmatikatos, Michail Flouris
Secondary Storage Management for Web Proxies. USENIX Symposium on Internet Technologies and Systems (1999)
Manolis Katevenis, Evangelos P. Markatos, Penny Vatsolaki, Chara Xanthaki
The Remote Enqueue Operation on Networks of Workstations. Informatica (Slovenia) 23 (1) (1999)
George Kornaros, Dionisios N. Pnevmatikatos, Panagiota Vatsolaki, George Kalokerinos, Chara Xanthaki, Dimitrios Mavroidis, Dimitrios N. Serpanos, Manolis Katevenis
ATLAS I: implementing a single-chip ATM switch with backpressure. IEEE Micro 19 (1) (1999)
Evangelos P. Markatos, Manolis Katevenis, Penny Vatsolaki
The Remote Enqueue Operation on Networks of Workstations. CANPC (1998)
Manolis Katevenis, Dimitrios N. Serpanos, Emmanuel Spyridakis
Credit-Flow-Controlled ATM for MP Interconnection: The ATLAS I Single-Chip ATM Switch. HPCA (1998)
Manolis Katevenis, Dimitrios N. Serpanos, George Dimitriadis
ATLAS I: a single-chip, gigabit ATM switch with HIC/HS links arid multi-lane back-pressure. Microprocess. Microsystems 21 (7-8) (1998)
George Kornaros, Christoforos E. Kozyrakis, Panagiota Vatsolaki, Manolis Katevenis
Pipelined Multi-Queue Management in a VLSI ATM Switch Chip with Credit-Based Flow-Control. ARVLSI (1997)
Manolis Katevenis, Evangelos P. Markatos, George Kalokerinos, Apostolos Dollas
Telegraphos: A Substrate for High-Performance Computing on Workstation Clusters. J. Parallel Distributed Comput. 43 (2) (1997)
Evangelos P. Markatos, Manolis Katevenis
User-Level DMA without Operating System Kernel Modification. HPCA (1997)
Manolis Katevenis, Panagiota Vatsolaki, Dimitrios N. Serpanos, Evangelos P. Markatos
ATLAS: A Single-Chip ATM Switch for NOWs. CANPC (1997)
Evangelos P. Markatos, Manolis Katevenis
Telegraphos: High-Performance Networking for Parallel Processing on Workstation Clusters. HPCA (1996)
Manolis Katevenis, Panagiota Vatsolaki, Aristides Efthymiou
Pipelined Memory Shared Buffer for VLSI Switches. SIGCOMM (1995)
Manolis Katevenis, Stefanos Sidiropoulos, Costas Courcoubetis
Weighted Round-Robin Cell Multiplexing in a General-Purpose ATM Switch Chip. IEEE J. Sel. Areas Commun. 9 (8) (1991)
Manolis Katevenis, Nestoras Tzartzanis
Reducing the Branch Penalty by Rearranging Instructions in Double-Width Memory. ASPLOS (1991)
Andrei Vladimirescu, David Weiss, Manolis Katevenis, Zvika Bronstein, Alon Kifir, Karja Danuwidjaja, K. C. Ng, Niraj Jain, Steven Lass
A Vector Hardware Accelerator with Circuit Simulation Emphasis. DAC (1987)
Manolis Katevenis
Fast switching and fair control of congested flow in broadband networks. IEEE J. Sel. Areas Commun. 5 (8) (1987)