Emil Matús

Publication Activity (10 Years)

Years Active: 2004-2024
Publications (10 Years): 53

Top Topics

Tightly Coupled

Memory Bandwidth

Energy Efficiency

Top Venues

Publications

Simon Friedrich, Robert Wittig, Emil Matús, Darius Grantz, Martin Zeller, Jens Benndorf, Gerhard P. Fettweis
A 22 nm 10 TOPS Mixed-Precision Neural Network SoC for Image Processing with Energy-Efficient Dilated Convolution Support. COOL CHIPS (2024)
Viktor Razilov, Robert Wittig, Emil Matús, Gerhard P. Fettweis
Access Interval Prediction by Partial Matching for Tightly Coupled Memory Systems. Int. J. Parallel Program. 52 (1-2) (2024)
Viktor Razilov, Juncen Zhong, Emil Matús, Gerhard P. Fettweis
Dual Vector Load for Improved Pipelining in Vector Processors. COOL CHIPS (2023)
Luis Godoy, Andrés Villamil, Emil Matús, Gerhard P. Fettweis
Optimal SDNR Digital Predistortion via Direct Inversion. ACSSC (2023)
Luis Godoy, Emil Matús, Gerhard P. Fettweis
Energy Efficiency Analysis of RF Power Amplifier Digital Predistortion in Full-Digital MIMO Transmitters. ICC Workshops (2023)
Simon Friedrich, Thomas Nalapat, Robert Wittig, Emil Matús, Gerhard P. Fettweis
On-Chip Memory Access Reduction for Energy-Efficient Dilated Convolution Processing. SAMOS (2023)
Fabian Kempf, Julian Höfer, Tanja Harbaum, Jürgen Becker, Nael Fasfous, Alexander Frickenstein, Hans-Jörg Vögel, Simon Friedrich, Robert Wittig, Emil Matús, Gerhard P. Fettweis, Matthias Lüders, Holger Blume, Jens Benndorf, Darius Grantz, Martin Zeller, Dietmar Engelke, Karl-Heinz Eickel
The ZuSE-KI-Mobil AI Accelerator SoC: Overview and a Functional Safety Perspective. DATE (2023)
Simon Friedrich, Chia-Ying Lin, Viktor Razilov, Robert Wittig, Emil Matús, Gerhard P. Fettweis
Access Interval Prediction with Neural Networks for Tightly Coupled Memory Systems. DSD (2023)
Simon Friedrich, Shambhavi Balamuthu Sampath, Robert Wittig, Manoj Rohit Vemparala, Nael Fasfous, Emil Matús, Walter Stechele, Gerhard P. Fettweis
Lightweight Instruction Set for Flexible Dilated Convolutions and Mixed-Precision Operands. ISQED (2023)
Joy Halder, Emil Matús, Gerhard P. Fettweis
Energy-Efficient Virtual Optical Network Embedding Over Mixed-Grid Optical Networks. NFV-SDN (2023)
Sheikh Faizan Qureshi, Stefan A. Damjancevic, Emil Matús, Dmitry Utyansky, Pieter van der Wolf, Gerhard P. Fettweis
Efficient Handover Mode Synchronization for NR-REDCAP on a Vector DSP. SAMOS (2023)
Viktor Razilov, Robert Wittig, Emil Matús, Gerhard P. Fettweis
Tagged Geometric History Length Access Interval Prediction for Tightly Coupled Memory Systems. SAMOS (2022)
Robert Wittig, Philipp Schulz, Emil Matús, Gerhard P. Fettweis
Accurate Estimation of Service Rates in Interleaved Scratchpad Memory Systems. ACM Trans. Embed. Comput. Syst. 21 (1) (2022)
Viktor Razilov, Emil Matús, Gerhard P. Fettweis
Communications Signal Processing Using RISC-V Vector Extension. IWCMC (2022)
Sheikh Faizan Qureshi, Stefan A. Damjancevic, Emil Matús, Dmitry Utyansky, Pieter van der Wolf, Gerhard P. Fettweis
Efficient Synchronization for NR-REDCAP Implemented on a Vector DSP. ASAP (2022)
Arne Fischer-Bühner, Emil Matús, Manil Dev Gomony, Lauri Anttila, Gerhard P. Fettweis, Mikko Valkama
Digital Predistortion with Compressed Observations for Cloud-Based Learning. SiPS (2021)
Luis Godoy, Emil Matús, Gerhard P. Fettweis
Energy efficiency optimization of radiofrequency power amplifiers for massive MIMO: a data based approach. SPAWC (2021)
Stefan A. Damjancevic, Emil Matús, Dmitry Utyansky, Pieter van der Wolf, Gerhard P. Fettweis
Channel Estimation for Advanced 5G/6G Use Cases on a Vector Digital Signal Processor. IEEE Open J. Circuits Syst. 2 (2021)
Seungseok Nam, Emil Matús, Gerhard P. Fettweis
Minimized Region of Path-search Algorithm for ASIP-based Connection Allocator in NoCs. ISVLSI (2021)
Stefan A. Damjancevic, Samuel Ajay Dasgupta, Emil Matús, Dmitry Utyanksy, Pieter van der Wolf, Gerhard P. Fettweis
Flexible Channel Estimation for 3GPP 5G IoT on a Vector Digital Signal Processor. SiPS (2021)
Seungseok Nam, Emil Matús, Gerhard P. Fettweis
An ASIP Approach to Path Allocation in TDM NoCs using Adaptive Search Region. ACM Great Lakes Symposium on VLSI (2020)
Mattis Hasler, Robert Wittig, Emil Matús, Gerhard P. Fettweis
Balancing Dynamic Scheduling Overhead to Maximize SDF Performance. 6G SUMMIT (2020)
Mattis Hasler, Robert Wittig, Emil Matús, Gerhard P. Fettweis
Slicing FIFOs for On-Chip Memory Bandwidth Exhaustion. IEEE Trans. Circuits Syst. I Regul. Pap. (2) (2020)
Nairuhi Grigoryan, Emil Matús, Gerhard P. Fettweis
Scalable 5G Signal Processing on Multiprocessor System: A Clustering Approach. 5G World Forum (2020)
Robert Wittig, Andrés Goens, Christian Menard, Emil Matús, Gerhard P. Fettweis, Jerónimo Castrillón
Modem Design in the Era of 5G and Beyond: The Need for a Formal Approach. ICT (2020)
Seungseok Nam, Emil Matús, Sadia Moriam, Gerhard P. Fettweis
Path-Spreading Search Algorithm and ASIP Approach for Connection Allocation in TDM-NoCs. ISVLSI (2020)
Mohammed Radi, Emil Matús, Gerhard P. Fettweis
Blind Packet-Based Receiver Chain Optimization Using Machine Learning. WCNC (2020)
Yong Chen, Emil Matús, Sadia Moriam, Gerhard P. Fettweis
High Performance Dynamic Resource Allocation for Guaranteed Service in Network-on-Chips. IEEE Trans. Emerg. Top. Comput. 8 (2) (2020)
Mohammed Radi, Emil Matús, Gerhard P. Fettweis
Low Complexity Convolutional Neural Networks for Wireless Receiver Chain Optimization. IEEE ANTS (2020)
Mohammed Radi, Emil Matús, Gerhard P. Fettweis
Channel Profile Independent Usage of Convolutional Neural Networks for Receiver Chain Optimization. LATINCOM (2020)
Seungseok Nam, Emil Matús, Gerhard P. Fettweis
Application Specific Instruction Processor for Dynamic Connection Allocation in TDM-NoCs. SoCC (2019)
Gerhard P. Fettweis, Mattis Hasler, Robert Wittig, Emil Matús, Stefan A. Damjancevic, Sebastian Haas, Friedrich Pauls, Seungseok Nam, Nairuhi Grigoryan
A Low-Power Scalable Signal Processing Chip Platform for 5G and Beyond - Kachel. ACSSC (2019)
Nairuhi Grigoryan, Emil Matús, Gerhard P. Fettweis
DF4CRAN: Dataflow Framework for Cloud-RAN Signal Processing. 5G World Forum (2019)
Robert Wittig, Mattis Hasler, Emil Matús, Gerhard P. Fettweis
Queue Based Memory Management Unit for Heterogeneous MPSoCs. DATE (2019)
Robert Wittig, Mattis Hasler, Emil Matús, Gerhard P. Fettweis
Probabilistic Models for Off-Line Arbiters in Embedded Systems. VLSI-SoC (2019)
Robert Wittig, Mattis Hasler, Emil Matús, Gerhard P. Fettweis
Statistical Access Interval Prediction for Tightly Coupled Memory Systems. COOL CHIPS (2019)
Gerhard P. Fettweis, Emil Matús, Robert Wittig, Mattis Hasler, Stefan A. Damjancevic, Seungseok Nam, Sebastian Haas
5G-and-Beyond Scalable Machines. VLSI-SoC (2019)
Stefan A. Damjancevic, Emil Matús, Dmitry Utyansky, Pieter van der Wolf, Gerhard P. Fettweis
Towards GFDM for Handsets - Efficient and Scalable Implementation on a Vector DSP. VTC Fall (2019)
Robert Wittig, Friedrich Pauls, Emil Matús, Gerhard P. Fettweis
Access Interval Prediction for Tightly Coupled Memory Systems. SAMOS (2019)
Robert Wittig, Stefan A. Damjancevic, Emil Matús, Gerhard P. Fettweis
General Multicarrier Modulation Hardware Accelerator for the Internet of Things. GLOBECOM (2019)
Mattis Hasler, Robert Wittig, Emil Matús, Gerhard P. Fettweis
A Hybrid Execution Approach to Improve the Performance of Dataflow Applications. ISOCC (2019)
Mattis Hasler, Robert Wittig, Emil Matús, Gerhard P. Fettweis
Slicing FIFOs for on-chip memory bandwidth exhaustion. ICECS (2018)
Sebastian Haas, Tobias Seifert, Benedikt Nöthen, Stefan Scholze, Sebastian Höppner, Andreas Dixius, Esther Pérez Adeva, Thomas R. Augustin, Friedrich Pauls, Sadia Moriam, Mattis Hasler, Erik Fischer, Yong Chen, Emil Matús, Georg Ellguth, Stephan Hartmann, Stefan Schiefer, Love Cederström, Dennis Walter, Stephan Henker, Stefan Hänzsche, Johannes Uhlig, Holger Eisenreich, Stefan Weithoffer, Norbert Wehn, René Schüffny, Christian Mayr, Gerhard P. Fettweis
A Heterogeneous SDR MPSoC in 28 nm CMOS for Low-Latency Wireless Applications. DAC (2017)
Yong Chen, Emil Matús, Gerhard P. Fettweis
Register-Exchange Based Connection Allocator for Circuit Switching NoCs. PDP (2017)
Yong Chen, Emil Matús, Gerhard P. Fettweis
Combined TDM and SDM Circuit Switching NoCs with Dedicated Connection Allocator. ISVLSI (2017)
Yong Chen, Emil Matús, Gerhard P. Fettweis
Combined Centralized and Distributed Connection Allocation in Large TDM Circuit Switching NoCs. ACM Great Lakes Symposium on VLSI (2017)
Gerhard P. Fettweis, Emil Matús
Scalable 5G MPSoC architecture. ACSSC (2017)
Yong Chen, Emil Matús, Gerhard P. Fettweis
Combined packet and TDM circuit switching NoCs with novel connection configuration mechanism. ISCAS (2017)
Manolis Marazakis, John Goodacre, Didier Fuin, Paul M. Carpenter, John Thomson, Emil Matús, Antimo Bruno, Per Stenström, Jérôme Martin, Yves Durand, Isabelle Dor
EUROSERVER: Share-anything scale-out micro-server design. DATE (2016)
Yong Chen, Emil Matús, Gerhard P. Fettweis
Centralized parallel multi-path multi-slot allocation approach for TDM NoCs. CCECE (2016)
Yong Chen, Emil Matús, Gerhard P. Fettweis
Trellis-search based Dynamic Multi-Path Connection Allocation for TDM-NoCs. ACM Great Lakes Symposium on VLSI (2016)
Sebastian Haas, Oliver Arnold, Benedikt Nöthen, Stefan Scholze, Georg Ellguth, Andreas Dixius, Sebastian Höppner, Stefan Schiefer, Stephan Hartmann, Stephan Henker, Thomas Hocker, Jörg Schreiter, Holger Eisenreich, Jens-Uwe Schlüßler, Dennis Walter, Tobias Seifert, Friedrich Pauls, Mattis Hasler, Yong Chen, Hermann Hensel, Sadia Moriam, Emil Matús, Christian Mayr, René Schüffny, Gerhard P. Fettweis
An MPSoC for energy-efficient database query processing. DAC (2016)
Sebastian Haas, Oliver Arnold, Stefan Scholze, Sebastian Höppner, Georg Ellguth, Andreas Dixius, Annett Ungethüm, Eric Mier, Benedikt Noethen, Emil Matús, Stefan Schiefer, Love Cederstroem, Fabian Pilz, Christian Mayr, René Schüffny, Wolfgang Lehner, Gerhard P. Fettweis
A database accelerator for energy-efficient query processing and optimization. NORCAS (2016)
Benedikt Noethen, Oliver Arnold, Esther P. Adeva, Tobias Seifert, Erik Fischer, Steffen Kunze, Emil Matús, Gerhard P. Fettweis, Holger Eisenreich, Georg Ellguth, Stephan Hartmann, Sebastian Höppner, Stefan Schiefer, J.-U. Schlusler, Stefan Scholze, Dennis Walter, René Schüffny
heterogeneous SDR MPSoC with energy-aware dynamic scheduling and iterative detection-decoding for 4G in 65nm CMOS. ISSCC (2014)
Oliver Arnold, Emil Matús, Benedikt Noethen, Markus Winter, Torsten Limberg, Gerhard P. Fettweis
Tomahawk: Parallelism and heterogeneity in communications signal processing MPSoCs. ACM Trans. Embed. Comput. Syst. 13 (3s) (2014)
Yves Durand, Paul M. Carpenter, Stefano Adami, Angelos Bilas, Denis Dutoit, Alexis Farcy, Georgi Gaydadjiev, John Goodacre, Manolis Katevenis, Manolis Marazakis, Emil Matús, Iakovos Mavroidis, John Thomson
EUROSERVER: Energy Efficient Node for European Micro-Servers. DSD (2014)
Oliver Arnold, Emil Matús, Benedikt Noethen, Friedrich Pauls, Gerhard P. Fettweis
Towards elastic SDR architectures using dynamic task management. GlobalSIP (2013)
Marcel Jar, Emil Matús, Esther P. Adeva, Eckhard Ohlmer, Gerhard P. Fettweis
Two-stage detector for SC-FDMA transmission over MIMO ISI channels. ISWCS (2012)
Markus Winter, Steffen Kunze, Esther P. Adeva, Björn Mennenga, Emil Matús, Gerhard P. Fettweis, Holger Eisenreich, Georg Ellguth, Sebastian Höppner, Stefan Scholze, René Schüffny, Tomoyoshi Kobori
65nm CMOS flexible MIMO detection-decoding engine achieving 4G wireless data rates. ISSCC (2012)
Steffen Kunze, Emil Matús, Gerhard P. Fettweis, Tomoyoshi Kobori
Combining LDPC, turbo and Viterbi decoders: Benefits and costs. SiPS (2011)
Marcel Bimberg, Emil Matús, Gerhard P. Fettweis
On the performance and numerical stability of soft-decision Reed-Solomon decoding. EUSIPCO (2009)
Björn Mennenga, Emil Matús, Gerhard P. Fettweis
Vectorization of the Sphere Detection Algorithm. ISCAS (2009)
Steffen Kunze, Emil Matús, Gerhard P. Fettweis
ASIP Decoder Architecture for Convolutional and LDPC Codes. ISCAS (2009)
Marcos B. S. Tavares, Emil Matús, Gerhard P. Fettweis
On the Structured Parallelism of Decoders for LDPC Convolutional Codes - an Algebraic Description. ISCAS (2009)
Maria Elizabeth Gonzalez, Attila Bilgic, Adam Lackorzynski, Dacian Tudor, Emil Matús, Irv Badr
ICT-Emuco. An innovative solution for future smart phones. ICME (2009)
Marcos B. S. Tavares, Emil Matús, Steffen Kunze, Gerhard P. Fettweis
A dual-core programmable decoder for LDPC convolutional codes. ISCAS (2008)
Torsten Limberg, Markus Winter, Marcel Bimberg, Reimund Klemm, Emil Matús, Marcos B. S. Tavares, Gerhard P. Fettweis, Hendrik Ahlendorf, Pablo Robelly
A fully programmable 40 GOPS SDR single chip baseband for LTE/WiMAX terminals. ESSCIRC (2008)
Marcos B. S. Tavares, Steffen Kunze, Emil Matús, Gerhard P. Fettweis
Architecture and VLSI realization of a high-speed programmable decoder for LDPC convolutional codes. ASAP (2008)
Marcel Bimberg, Marcos B. S. Tavares, Emil Matús, Gerhard P. Fettweis
A High-Throughput Programmable Decoder for LDPC Convolutional Codes. ASAP (2007)
Emil Matús, Marcos B. S. Tavares, Marcel Bimberg, Gerhard P. Fettweis
Towards a GBit/s Programmable Decoder for LDPC Convolutional Codes. ISCAS (2007)
Jie Guo, Torsten Limberg, Emil Matús, Björn Mennenga, Reimund Klemm, Gerhard P. Fettweis
Code Generation for STA Architecture. Euro-Par (2006)
Emil Matús, Gordon Cichon, Hendrik Seidel, Pablo Robelly, Torsten Limberg, Gerhard P. Fettweis
A Compiler-friendly and Low-power DSP architecture. GI Jahrestagung (1) (2005)
Gordon Cichon, Pablo Robelly, Hendrik Seidel, Emil Matús, Marcus Bronzel, Gerhard P. Fettweis
Synchronous Transfer Architecture (STA). SAMOS (2004)
Hendrik Seidel, Emil Matús, Gordon Cichon, Pablo Robelly, Marcus Bronzel, Gerhard P. Fettweis
Generated DSP Cores for Implementation of an OFDM Communication System. SAMOS (2004)