Pablo Robelly

Publication Activity (10 Years)

Years Active: 2004-2008
Publications (10 Years): 0

Publications

Pablo Robelly, Gordon Cichon, Hendrik Ahlendorf, Gerhard P. Fettweis
A HW/SW design methodology for embedded SIMD vector signal processors. Int. J. Embed. Syst. 3 (3) (2008)
Torsten Limberg, Markus Winter, Marcel Bimberg, Reimund Klemm, Emil Matús, Marcos B. S. Tavares, Gerhard P. Fettweis, Hendrik Ahlendorf, Pablo Robelly
A fully programmable 40 GOPS SDR single chip baseband for LTE/WiMAX terminals. ESSCIRC (2008)
Pablo Robelly, Hendrik Seidel, K. C. Chen, Gerhard P. Fettweis
Energy efficiency vs. programmability trade-off: architectures and design principles. DATE (2006)
E. Matu, Hendrik Seidel, Torsten Limberg, Pablo Robelly, Gerhard P. Fettweis
A GFLOPS Vector-DSP for Broadband Wireless Applications. CICC (2006)
Emil Matús, Gordon Cichon, Hendrik Seidel, Pablo Robelly, Torsten Limberg, Gerhard P. Fettweis
A Compiler-friendly and Low-power DSP architecture. GI Jahrestagung (1) (2005)
Pablo Robelly, Arne Lehmann, Gerhard P. Fettweis
Two-Dimensional Fast Cosine Transform for Vector-STA Architectures. SAMOS (2005)
Gordon Cichon, Pablo Robelly, Hendrik Seidel, Emil Matús, Marcus Bronzel, Gerhard P. Fettweis
Synchronous Transfer Architecture (STA). SAMOS (2004)
Gordon Cichon, Pablo Robelly, Hendrik Seidel, Marcus Bronzel, Gerhard P. Fettweis
Compiler Scheduling for STA-Processors. PARELEC (2004)
Hendrik Seidel, Emil Matús, Gordon Cichon, Pablo Robelly, Marcus Bronzel, Gerhard P. Fettweis
Generated DSP Cores for Implementation of an OFDM Communication System. SAMOS (2004)
Pablo Robelly, Gordon Cichon, Hendrik Seidel, Gerhard P. Fettweis
Automatic Code Generation for SIMD DSP Architectures: An Algebraic Approach. PARELEC (2004)
Hendrik Seidel, Gordon Cichon, Pablo Robelly, Marcus Bronzel, Gerhard P. Fettweis
Hardware / Software Co-Design of a SIMD-DSP-Based DVB-T Receiver. PARELEC (2004)