René Schüffny

Publication Activity (10 Years)

Years Active: 1996-2020
Publications (10 Years): 12

Top Venues

CoRR

ISCAS

ECCTD

ICECS

Dresden University of Technology, Germany (PHD)

Education History

Dresden University of Technology, Germany

PHD

Publications

Johannes Partzsch, Christian Mayr, Massimiliano Giulioni, Marko Noack, Stefan Hänzsche, Stefan Scholze, Sebastian Höppner, Paolo Del Giudice, René Schüffny
Mean Field Approach for Configuring Population Dynamics on a Biohybrid Neuromorphic System. J. Signal Process. Syst. 92 (11) (2020)
Johannes Partzsch, Christian Mayr, Massimiliano Giulioni, Marko Noack, Stefan Hänzsche, Stefan Scholze, Sebastian Höppner, Paolo Del Giudice, René Schüffny
Mean Field Approach for Configuring Population Dynamics on a Biohybrid Neuromorphic System. CoRR (2019)
Sebastian Haas, Tobias Seifert, Benedikt Nöthen, Stefan Scholze, Sebastian Höppner, Andreas Dixius, Esther Pérez Adeva, Thomas R. Augustin, Friedrich Pauls, Sadia Moriam, Mattis Hasler, Erik Fischer, Yong Chen, Emil Matús, Georg Ellguth, Stephan Hartmann, Stefan Schiefer, Love Cederström, Dennis Walter, Stephan Henker, Stefan Hänzsche, Johannes Uhlig, Holger Eisenreich, Stefan Weithoffer, Norbert Wehn, René Schüffny, Christian Mayr, Gerhard P. Fettweis
A Heterogeneous SDR MPSoC in 28 nm CMOS for Low-Latency Wireless Applications. DAC (2017)
Sebastian Haas, Stefan Scholze, Sebastian Höppner, Annett Ungethüm, Christian Mayr, René Schüffny, Wolfgang Lehner, Gerhard P. Fettweis
Application-specific architectures for energy-efficient database query processing and optimization. Microprocess. Microsystems 55 (2017)
Mihai A. Petrovici, Sebastian Schmitt, Johann Klähn, David Stöckel, Anna Schroeder, Guillaume Bellec, Johannes Bill, Oliver Breitwieser, Ilja Bytschok, Andreas Grübl, Maurice Güttler, Andreas Hartel, Stephan Hartmann, Dan Husmann de Oliveira, Kai Husmann, Sebastian Jeltsch, Vitali Karasenko, Mitja Kleider, Christoph Koke, Alexander Kononov, Christian Mauch, Paul Müller, Johannes Partzsch, Thomas Pfeil, Stefan Schiefer, Stefan Scholze, Anand Subramoney, Vasilis N. Thanasoulis, Bernhard Vogginger, Robert Legenstein, Wolfgang Maass, René Schüffny, Christian Mayr, Johannes Schemmel, Karlheinz Meier
Pattern representation and recognition with accelerated analog neuromorphic systems. CoRR (2017)
Johannes Partzsch, Sebastian Höppner, Matthias Eberlein, René Schüffny, Christian Mayr, David R. Lester, Steve B. Furber
A fixed point exponential function accelerator for a neuromorphic many-core system. ISCAS (2017)
Mihai A. Petrovici, Sebastian Schmitt, Johann Klähn, Robert D. St. Louis, Anna Schroeder, Guillaume Bellec, Johannes Bill, Oliver Breitwieser, Ilja Bytschok, Andreas Grübl, Maurice Güttler, Andreas Hartel, Stephan Hartmann, Dan Husmann de Oliveira, Kai Husmann, Sebastian Jeltsch, Vitali Karasenko, Mitja Kleider, Christoph Koke, Alexander Kononov, Christian Mauch, Eric Müller, Paul Müller, Johannes Partzsch, Thomas Pfeil, Stefan Schiefer, Stefan Scholze, Anand Subramoney, Vasilis N. Thanasoulis, Bernhard Vogginger, Robert Legenstein, Wolfgang Maass, René Schüffny, Christian Mayr, Johannes Schemmel, Karlheinz Meier
Pattern representation and recognition with accelerated analog neuromorphic systems. ISCAS (2017)
Sebastian Schmitt, Johann Klähn, Guillaume Bellec, Andreas Grübl, Maurice Güttler, Andreas Hartel, Stephan Hartmann, Dan Husmann de Oliveira, Kai Husmann, Sebastian Jeltsch, Vitali Karasenko, Mitja Kleider, Christoph Koke, Alexander Kononov, Christian Mauch, Eric Müller, Paul Müller, Johannes Partzsch, Mihai A. Petrovici, Stefan Schiefer, Stefan Scholze, Vasilis N. Thanasoulis, Bernhard Vogginger, Robert Legenstein, Wolfgang Maass, Christian Mayr, René Schüffny, Johannes Schemmel, Karlheinz Meier
Neuromorphic hardware in the loop: Training a deep spiking network on the BrainScaleS wafer-scale system. IJCNN (2017)
Sebastian Höppner, Johannes Partzsch, Johannes Neumann, René Schüffny, Christian Mayr
A Calibration Technique for Bang-Bang ADPLLs Using Jitter Distribution Monitoring. IEEE Trans. Very Large Scale Integr. Syst. 24 (12) (2016)
Sebastian Haas, Oliver Arnold, Benedikt Nöthen, Stefan Scholze, Georg Ellguth, Andreas Dixius, Sebastian Höppner, Stefan Schiefer, Stephan Hartmann, Stephan Henker, Thomas Hocker, Jörg Schreiter, Holger Eisenreich, Jens-Uwe Schlüßler, Dennis Walter, Tobias Seifert, Friedrich Pauls, Mattis Hasler, Yong Chen, Hermann Hensel, Sadia Moriam, Emil Matús, Christian Mayr, René Schüffny, Gerhard P. Fettweis
An MPSoC for energy-efficient database query processing. DAC (2016)
Christian Mayr, Johannes Partzsch, Marko Noack, Stefan Hänzsche, Stefan Scholze, Sebastian Höppner, Georg Ellguth, René Schüffny
A Biological-Realtime Neuromorphic System in 28 nm CMOS Using Low-Leakage Switched Capacitor Circuits. IEEE Trans. Biomed. Circuits Syst. 10 (1) (2016)
Sebastian Haas, Oliver Arnold, Stefan Scholze, Sebastian Höppner, Georg Ellguth, Andreas Dixius, Annett Ungethüm, Eric Mier, Benedikt Noethen, Emil Matús, Stefan Schiefer, Love Cederstroem, Fabian Pilz, Christian Mayr, René Schüffny, Wolfgang Lehner, Gerhard P. Fettweis
A database accelerator for energy-efficient query processing and optimization. NORCAS (2016)
Andreas Dixius, Dennis Walter, Sebastian Höppner, Holger Eisenreich, René Schüffny
A deep-submicron CMOS flow for general-purpose timing-detection insertion. MIXDES (2015)
Sebastian Höppner, Stefan Hänzsche, Stefan Scholze, René Schüffny
An all-digital PWM generator with 62.5ps resolution in 28nm CMOS technology. ISCAS (2015)
Sebastian Höppner, Dennis Walter, Thomas Hocker, Stephan Henker, Stefan Hänzsche, Daniel Sausner, Georg Ellguth, Jens-Uwe Schluessler, Holger Eisenreich, René Schüffny
An Energy Efficient Multi-Gbit/s NoC Transceiver Architecture With Combined AC/DC Drivers and Stoppable Clocking in 65 nm and 28 nm CMOS. IEEE J. Solid State Circuits 50 (3) (2015)
Mihai A. Petrovici, Bernhard Vogginger, Paul Müller, Oliver Breitwieser, Mikael Lundqvist, Lyle Muller, Matthias Ehrlich, Alain Destexhe, Anders Lansner, René Schüffny, Johannes Schemmel, Karlheinz Meier
Bridging the gap between software simulation and emulation on neuromorphic hardware: An investigation of causes, effects and compensation of network-level anomalies in a mixed-signal waferscale neuromorphic modeling platform. CoRR (2014)
Christian Mayr, Johannes Partzsch, Marko Noack, Stefan Hänzsche, Stefan Scholze, Sebastian Höppner, Georg Ellguth, René Schüffny
A Biological-Realtime Neuromorphic System in 28 nm CMOS using Low-Leakage Switched Capacitor Circuits. CoRR (2014)
Vasilis N. Thanasoulis, Johannes Partzsch, Bernhard Vogginger, René Schüffny
Configurable pulse routing architecture for accelerated multi-node neuromorphic systems. ICECS (2014)
Vasilis N. Thanasoulis, Bernhard Vogginger, Johannes Partzsch, René Schüffny
A pulse communication flow ready for accelerated neuromorphic experiments. ISCAS (2014)
Christian Mayr, Michael Schultz, Marko Noack, Stephan Henker, Johannes Partzsch, René Schüffny
OTA based 200 GΩ resistance on 700 μm2 in 180 nm CMOS for neuromorphic applications. CoRR (2014)
Christian Mayr, René Schüffny
Applying Spiking Neural Nets to Noise Shaping. CoRR (2014)
Johannes Gorner, Sebastian Höppner, Dennis Walter, Michael Haas, Dirk Plettemeier, René Schüffny
An energy efficient multi-bit TSV transmitter using capacitive coupling. ICECS (2014)
Christian Mayr, René Schüffny
Neighborhood Rank Order Coding for Robust Texture Analysis and Feature Extraction. CoRR (2014)
Benedikt Noethen, Oliver Arnold, Esther P. Adeva, Tobias Seifert, Erik Fischer, Steffen Kunze, Emil Matús, Gerhard P. Fettweis, Holger Eisenreich, Georg Ellguth, Stephan Hartmann, Sebastian Höppner, Stefan Schiefer, J.-U. Schlusler, Stefan Scholze, Dennis Walter, René Schüffny
heterogeneous SDR MPSoC with energy-aware dynamic scheduling and iterative detection-decoding for 4G in 65nm CMOS. ISSCC (2014)
Stefan Hänzsche, Sebastian Höppner, Georg Ellguth, René Schüffny
A 12-b 4-MS/s SAR ADC With Configurable Redundancy in 28-nm CMOS Technology. IEEE Trans. Circuits Syst. II Express Briefs (11) (2014)
Andreas Richter, Andreas Voigt, René Schüffny, Stephan Henker, Marcus Völp
Integrated circuits processing chemical information: Prospects and challenges. DATE (2014)
Marko Noack, Johannes Partzsch, Christian Mayr, Stefan Hänzsche, Stefan Scholze, Sebastian Höppner, Georg Ellguth, René Schüffny
Switched-Capacitor Realization of Presynaptic Short-Term-Plasticity and Stop-Learning Synapses in 28 nm CMOS. CoRR (2014)
Sebastian Dietel, Sebastian Höppner, Holger Eisenreich, Georg Ellguth, Stefan Hänzsche, Stephan Henker, René Schüffny, Tim Brauninger, Ulrich Fiedler
A compact on-chip IR-drop measurement system in 28 nm CMOS technology. ISCAS (2014)
Marko Noack, Markus Krause, Christian Mayr, Johannes Partzsch, René Schüffny
VLSI implementation of a conductance-based multi-synapse using switched-capacitor circuits. ISCAS (2014)
Stefan Hänzsche, Sebastian Höppner, René Schüffny
A 10 bit 16 MS/s redundant SAR ADC with flexible window function for a digitally controlled DC-DC converter in 28 nm CMOS. NORCHIP (2014)
Christian Mayr, Arne Heittmann, René Schüffny
Gabor-like Image Filtering using a Neural Microcircuit. CoRR (2014)
Stefan Hänzsche, René Schüffny
Analysis of a charge redistribution SAR ADC with partially thermometer coded DAC. ECCTD (2013)
Johannes Gorner, Johannes Uhlig, Stefan Hänzsche, René Schüffny
Behavioral model of a continuous current integrator with time discrete feedback and sampling. ECCTD (2013)
Alexander D. Rast, Johannes Partzsch, Christian Mayr, Johannes Schemmel, Stefan Hartmann, Luis A. Plana, Steve Temple, David R. Lester, René Schüffny, Steve B. Furber
A location-independent direct link neuromorphic interface. IJCNN (2013)
Johannes Partzsch, Christian Mayr, Bernhard Vogginger, René Schüffny, Alexander D. Rast, Luis A. Plana, Steve B. Furber
Live demonstration: Ethernet communication linking two large-scale neuromorphic systems. ECCTD (2013)
Sebastian Höppner, Holger Eisenreich, Stephan Henker, Dennis Walter, Georg Ellguth, René Schüffny
A Compact Clock Generator for Heterogeneous GALS MPSoCs in 65-nm CMOS Technology. IEEE Trans. Very Large Scale Integr. Syst. 21 (3) (2013)
Sebastian Höppner, Stefan Hänzsche, Georg Ellguth, Dennis Walter, Holger Eisenreich, René Schüffny
A Fast-Locking ADPLL With Instantaneous Restart Capability in 28-nm CMOS Technology. IEEE Trans. Circuits Syst. II Express Briefs (11) (2013)
Matthias Ehrlich, René Schüffny
Neural Schematics as a unified formal graphical representation of large-scale Neural Network Structures. Frontiers Neuroinformatics 7 (2013)
Christian Mayr, Johannes Partzsch, Marko Noack, René Schüffny
Live demonstration: Multiple-timescale plasticity in a neuromorphic system. ISCAS (2013)
Johannes Uhlig, Stefan Hänzsche, Johannes Gorner, René Schüffny, Thomas Reichel, Lars Gopfert
Hybrid incremental-ΣΔ-ADC for ambient light sensing applications. ISCAS (2013)
Love Cederstroem, Paul Stärke, Christian Mayr, Yao Shuai, Heidemarie Schmidt, René Schüffny
A model based comparison of BiFeO3 device applicability in neuromorphic hardware. ISCAS (2013)
Johannes Uhlig, Stefan Hänzsche, René Schüffny, Thomas Reichel, Lars Gopfert, Valeri Razhenikov
Rapid prototyping of higher order incremental ΣΔ-ADC topologies and NTFs. ICECS (2013)
Sebastian Höppner, Dennis Walter, Holger Eisenreich, Stefan Schiefer, René Schüffny
Live demonstration: A 90GBit/s serial NoC link over 6mm in 65nm CMOS technology. ECCTD (2013)
Sebastian Höppner, Dennis Walter, Georg Ellguth, René Schüffny
On-Chip Measurement and Compensation of Timing Imbalances in High-Speed Serial NoC Links. Int. J. Embed. Real Time Commun. Syst. 3 (4) (2012)
Christian Mayr, Paul Stärke, Johannes Partzsch, René Schüffny, Love Cederstroem, Yao Shuai, Nan Du, Heidemarie Schmidt
Waveform Driven Plasticity in BiFeO3 Memristive Devices: Model and Implementation. NIPS (2012)
Stephan Henker, Johannes Partzsch, René Schüffny
Accuracy evaluation of numerical methods used in state-of-the-art simulators for spiking neural networks. J. Comput. Neurosci. 32 (2) (2012)
Sebastian Höppner, Chenming Shao, Holger Eisenreich, Georg Ellguth, Mario Ander, René Schüffny
A power management architecture for fast per-core DVFS in heterogeneous MPSoCs. ISCAS (2012)
Vasilis N. Thanasoulis, Johannes Partzsch, Stephan Hartmann, Christian Mayr, René Schüffny
Dedicated FPGA communication architecture and design for a large-scale neuromorphic system. ICECS (2012)
Johannes Partzsch, René Schüffny
Developing structural constraints on connectivity for biologically embedded neural networks. Biol. Cybern. 106 (3) (2012)
Johannes Uhlig, René Schüffny
Incremental-ΣΔ-ADCs with dynamic conversion length adaption. ICECS (2012)
Vasilis N. Thanasoulis, Johannes Partzsch, Bernhard Vogginger, Christian Mayr, René Schüffny
Long-term pulse stimulation and recording in an accelerated neuromorphic system. ICECS (2012)
Markus Winter, Steffen Kunze, Esther P. Adeva, Björn Mennenga, Emil Matús, Gerhard P. Fettweis, Holger Eisenreich, Georg Ellguth, Sebastian Höppner, Stefan Scholze, René Schüffny, Tomoyoshi Kobori
65nm CMOS flexible MIMO detection-decoding engine achieving 4G wireless data rates. ISSCC (2012)
Dennis Walter, Sebastian Höppner, Holger Eisenreich, Georg Ellguth, Stephan Henker, Stefan Hänzsche, René Schüffny, Markus Winter, Gerhard P. Fettweis
A source-synchronous 90Gb/s capacitively driven serial on-chip link over 6mm in 65nm CMOS. ISSCC (2012)
Stefan Hänzsche, Stephan Henker, René Schüffny, Thomas Reichel, Matthias Garzarolli
A 14 bit self-calibrating charge redistribution SAR ADC. ISCAS (2012)
Stefan Scholze, Holger Eisenreich, Sebastian Höppner, Georg Ellguth, Stephan Henker, Mario Ander, Stefan Hänzsche, Johannes Partzsch, Christian Mayr, René Schüffny
A 32 GBit/s communication SoC for a waferscale neuromorphic system. Integr. 45 (1) (2012)
Johannes Schemmel, Andreas Grübl, Stephan Hartmann, Alexander Kononov, Christian Mayr, Karlheinz Meier, Sebastian Millner, Johannes Partzsch, Stefan Schiefer, Stefan Scholze, René Schüffny, Marc-Olivier Schwartz
Live demonstration: A scaled-down version of the BrainScaleS wafer-scale neuromorphic system. ISCAS (2012)
Johannes Uhlig, René Schüffny
An empirical study of the stability of 4th-order Incremental-ΣΔ-ADCs. NORCHIP (2011)
Marko Noack, Christian Mayr, Johannes Partzsch, René Schüffny
Synapse dynamics in CMOS derived from a model of neurotransmitter release. ECCTD (2011)
Johannes Partzsch, René Schüffny
Analyzing the Scaling of Connectivity in Neuromorphic Hardware and in Models of Neural Networks. IEEE Trans. Neural Networks 22 (6) (2011)
Stefan Schiefer, Stephan Hartmann, Stefan Scholze, Johannes Partzsch, Christian Mayr, Stephan Henker, René Schüffny
Live demonstration: Packet-based AER with 3Gevent/s cumulative throughput. ISCAS (2011)
Sebastian Höppner, Dennis Walter, Georg Ellguth, René Schüffny
Mismatch characterization of high-speed NoC links using asynchronous sub-sampling. SoC (2011)
Daniel Brüderle, Mihai A. Petrovici, Bernhard Vogginger, Matthias Ehrlich, Thomas Pfeil, Sebastian Millner, Andreas Grübl, Karsten Wendt, Eric Müller, Marc-Olivier Schwartz, Dan Husmann de Oliveira, Sebastian Jeltsch, Johannes Fieres, Moritz Schilling, Paul Müller, Oliver Breitwieser, Venelin Petkov, Lyle Muller, Andrew P. Davison, Pradeep Krishnamurthy, Jens Kremkow, Mikael Lundqvist, Eilif Mueller, Johannes Partzsch, Stefan Scholze, Lukas Zühl, Christian Mayr, Alain Destexhe, Markus Diesmann, Tobias C. Potjans, Anders Lansner, René Schüffny, Johannes Schemmel, Karlheinz Meier
A comprehensive workflow for general-purpose neural modeling with highly configurable neuromorphic hardware systems. Biol. Cybern. 104 (4-5) (2011)
Matthias Ehrlich, Karsten Wendt, Lukas Zühl, René Schüffny, Daniel Brüderle, Eric Müller, Bernhard Vogginger
A Software Framework for Mapping Neural Networks to a Wafer-scale Neuromorphic Hardware System. ANNIIP (2010)
Sebastian Höppner, Dennis Walter, Holger Eisenreich, René Schüffny
Efficient compensation of delay variations in high-speed network-on-chip data links. SoC (2010)
Christian Mayr, Johannes Partzsch, René Schüffny
A critique of BCM behavior verification for STDP-type plasticity models. ESANN (2010)
Karsten Wendt, Matthias Ehrlich, René Schüffny
GMPath - A Path Language for Navigation, Information Query and Modification of Data Graphs. ANNIIP (2010)
Sebastian Höppner, René Schüffny, Zuo-Min Tsai, Huei Wang
Wide swing signal amplification by SC voltage doubling. ISCAS (2010)
Christian Mayr, Marko Noack, Johannes Partzsch, René Schüffny
Replicating experimental spike and rate based neural learning in CMOS. ISCAS (2010)
Stephan Hartmann, Stefan Schiefer, Stefan Scholze, Johannes Partzsch, Christian Mayr, Stephan Henker, René Schüffny
Highly integrated packet-based AER communication infrastructure with 3Gevent/S throughput. ICECS (2010)
Johannes Uhlig, Sebastian Höppner, Georg Ellguth, René Schüffny
A low-power cell-based-design multi-port register file in 65nm CMOS technology. ISCAS (2010)
Johannes Uhlig, René Schüffny, Harald Neubauer, Johann Hauer, Joachim Haase
A low-power continuous-time incremental 2nd-order-MASH ΣΔ-modulator for a CMOS imager. ICECS (2009)
Georg Ellguth, Stephan Henker, Christian Mayr, René Schüffny
Current conveyor based amplifier and adaptive buffer for use in an analog frontend. ICECS (2009)
Christian Mayr, Johannes Partzsch, René Schüffny
On the Relation between Bursts and Dynamic Synapse Properties: A Modulation-Based Ansatz. Comput. Intell. Neurosci. 2009 (2009)
Johannes Partzsch, René Schüffny
On the routing complexity of neural network models - Rent's Rule revisited. ESANN (2009)
Holger Eisenreich, Christian Mayr, Stephan Henker, Michael Wickert, René Schüffny
A novel ADPLL design using successive approximation frequency control. Microelectron. J. 40 (11) (2009)
Christian Mayr, Johannes Partzsch, René Schüffny
Transient responses of activity-dependent synapses to modulated pulse trains. Neurocomputing 73 (1-3) (2009)
Johannes Partzsch, Christian Mayr, René Schüffny
BCM and Membrane Potential: Alternative Ways to Timing Dependent Plasticity. ICONIP (1) (2008)
Christian Mayr, Arne Heittmann, René Schüffny
Gabor-Like Image Filtering Using a Neural Microcircuit. IEEE Trans. Neural Networks 18 (3) (2007)
Christian Mayr, René Schüffny
Neighborhood Rank Order Coding for Robust Texture Analysis and Feature Extraction. HIS (2007)
Christian Mayr, René Schüffny
Applying Spiking Neural Nets to Noise Shaping. IEICE Trans. Inf. Syst. (8) (2005)
Daniel Matolin, Jörg Schreiter, Stefan Getzlaff, René Schüffny
An Analog VLSI Pulsed Neural Network Implementation for Image Segmentation. PARELEC (2004)
Matthias Tänzer, Achim Graupner, René Schüffny
Design and evaluation of current-mode image sensors in CMOS-technology. IEEE Trans. Circuits Syst. II Express Briefs (10) (2004)
Jörg Schreiter, Ulrich Ramacher, Arne Heittmann, Daniel Matolin, René Schüffny
Cellular pulse-coupled neural network with adaptive weights for image segmentation and its VLSI implementation. Image Processing: Algorithms and Systems (2004)
Jörg Schreiter, Ulrich Ramacher, Arne Heittmann, Daniel Matolin, René Schüffny
Pulse coupled neural networks with adaptive synapses for image segmentation. ARCS Workshops (2004)
Martin Franz, René Schüffny
Optimized filter banks for the compression of subtraction angiographic images. ISSPA (1) (2003)
Martin Franz, René Schüffny
Segmentation of Blood Vessels in Subtraction Angiographic Images. DICTA (2003)
Stephan Henker, Jens-Uwe Schluessler, René Schüffny
Concept of Color Correction on Multi-Channel CMOS Sensors. DICTA (2003)
Achim Graupner, Jörg Schreiter, Stefan Getzlaff, René Schüffny
CMOS image sensor with mixed-signal processor array. IEEE J. Solid State Circuits 38 (6) (2003)
Markus Rullmann, Jens-Uwe Schluessler, René Schüffny
On-chip digital noise reduction for integrated CMOS Cameras. VCIP (2003)
Riad Stefo, Jörg Schreiter, Jens-Uwe Schluessler, René Schüffny
High resolution ADPLL frequency synthesizer for FPGA-and ASIC-based applications. FPT (2003)
Achim Graupner, Sven Linzmajer, Gerhard P. Fettweis, René Schüffny
Comparison of accumulation units for analog realizations of a path searcher for a UMTS receiver. ICECS (2003)
Jörg Schreiter, Ulrich Ramacher, Arne Heittmann, D. Matolini, René Schüffny
Analog implementation for networks of integrate-and-fire neurons with adaptive local connectivity. NNSP (2002)
Arne Heittmann, Ulrich Ramacher, Daniel Matolin, Jörg Schreiter, René Schüffny
An Analog VLSI Pulsed Neural Network for Image Segmentation Using Adaptive Connection Weights. ICANN (2002)
Achim Graupner, M. Tanzer, René Schüffny
CMOS image sensor with shared in-pixel amplifier and calibration facility. APCCAS (2) (2002)
Achim Graupner, Stefan Getzlaff, Jörg Schreiter, René Schüffny
A vision device for image processing. SIP (2001)
Jörg Krupar, Rico Srowik, Jörg Schreiter, Achim Graupner, René Schüffny, Udo Jörges
Minimizing charge injection errors in high-precision, high-speed SC-circuits. ISCAS (1) (2001)
Stefan Getzlaff, Jörg Schreiter, Achim Graupner, René Schüffny
A system-on-chip realization of a CMOS image sensor with programmable analog image preprocessing. ISCAS (4) (2001)
Achim Graupner, René Schüffny
Robust Implementation and Statistical Modeling of a VI-Converter. SBCCI (2000)
Jörg Schreiter, Rico Srowik, Achim Graupner, Stefan Getzlaff, René Schüffny
Design of parallel preprocessing image sensors. KES (1999)
M. Schwarzenberg, M. Traber, M. Scholles, René Schüffny
A VLSI chip for wavelet image compression. ISCAS (4) (1999)

René Schüffny.css-eqlu8i{font-size:small;padding-left:4px;}

Publication Activity (10 Years)

Top Topics

Top Venues

René Schüffny