An Energy Efficient Multi-Gbit/s NoC Transceiver Architecture With Combined AC/DC Drivers and Stoppable Clocking in 65 nm and 28 nm CMOS.
Sebastian HöppnerDennis WalterThomas HockerStephan HenkerStefan HänzscheDaniel SausnerGeorg EllguthJens-Uwe SchluesslerHolger EisenreichRené SchüffnyPublished in: IEEE J. Solid State Circuits (2015)
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