High resolution ADPLL frequency synthesizer for FPGA-and ASIC-based applications.
Riad StefoJörg SchreiterJens-Uwe SchluesslerRené SchüffnyPublished in: FPT (2003)
Keyphrases
- phase locked loop
- high resolution
- hardware implementation
- hardware architecture
- single chip
- user friendly
- low resolution
- high frequency
- xilinx virtex
- low frequency
- field programmable gate array
- fpga implementation
- super resolution
- image processing
- multipath
- real time image processing
- signal processing
- integrated circuit
- field of view
- hardware design
- hardware architectures
- efficient implementation
- remote sensing
- design methodology
- sonar images
- low cost
- high voltage
- real time
- high quality
- high resolution images
- text to speech
- user interface
- fpga device
- face recognition
- parallel architecture
- high speed
- pipelined architecture