Arne Heittmann

Publication Activity (10 Years)

Years Active: 2002-2024
Publications (10 Years): 4

Top Venues

CoRR

ISCAS

NANOARCH

DATE

University of Paderborn, Germany (PHD)

Education History

University of Paderborn, Germany

PHD

Publications

Mohammad Hizzani, Arne Heittmann, George Higgins Hutchinson, Dmitrii Dobrynin, Thomas Van Vaerenbergh, Tinish Bhattacharya, Adrien Renaudineau, Dmitri B. Strukov, John Paul Strachan
Memristor-based hardware and algorithms for higher-order Hopfield optimization solver outperforming quadratic Ising machines. ISCAS (2024)
Mohammad Hizzani, Arne Heittmann, George Hutchinson, Dmitrii Dobrynin, Thomas Van Vaerenbergh, Tinish Bhattacharya, Adrien Renaudineau, Dmitri B. Strukov, John Paul Strachan
Memristor-based hardware and algorithms for higher-order Hopfield optimization solver outperforming quadratic Ising machines. CoRR (2023)
Arne Heittmann, Tobias G. Noll
Architecture and optimization of associative memories used for the implementation of logic functions based on nanoelectronic 1S1R cells. DATE (2018)
Arne Heittmann, Tobias G. Noll
Mixing circuit based on neural associative memories and nanoelectronic 1S1R cells. NANOARCH (2017)
Arne Heittmann, Tobias G. Noll
Variability analysis of a hybrid CMOS/RS nanoelectronic calibration circuit. ISCAS (2014)
Christian Mayr, Arne Heittmann, René Schüffny
Gabor-like Image Filtering using a Neural Microcircuit. CoRR (2014)
Arne Heittmann, Tobias G. Noll
Modeling variability and irreproducibility of nanoelectronic resistive switches for circuit simulation. ASP-DAC (2013)
Qin Wang, Arne Heittmann, Tobias G. Noll
Analysis of the area-delay performance of hybrid nanoelectronic memory cores used in field programmable gate arrays. ACM Great Lakes Symposium on VLSI (2013)
Arne Heittmann, Tobias G. Noll
Variability evaluation of feedback circuits used in nanoelectronic Memristive/CMOS circuits. ACM Great Lakes Symposium on VLSI (2013)
Arne Heittmann, Tobias G. Noll
A hybrid CMOS/memristive nanoelectronic circuit for programming synaptic weights. ESANN (2012)
Arne Heittmann, Tobias G. Noll
A Monte Carlo analysis of a write method used in passive nanoelectronic crossbars. NANOARCH (2012)
Arne Heittmann, Tobias G. Noll
Limits of writing multivalued resistances in passive nanoelectronic crossbars used in neuromorphic circuits. ACM Great Lakes Symposium on VLSI (2012)
Arne Heittmann, Tobias G. Noll
Sensitivity of neuromorphic circuits using nanoelectronic resistive switches to pulse synchronization. ACM Great Lakes Symposium on VLSI (2011)
Christian Mayr, Arne Heittmann, René Schüffny
Gabor-Like Image Filtering Using a Neural Microcircuit. IEEE Trans. Neural Networks 18 (3) (2007)
Peter Benkart, Alexander Kaiser, Andreas Munding, Markus Bschorr, Hans-Jörg Pfleiderer, Erhard Kohn, Arne Heittmann, Holger Huebner, Ulrich Ramacher
3D Chip Stack Technology Using Through-Chip Interconnects. IEEE Des. Test Comput. 22 (6) (2005)
Jörg Schreiter, Ulrich Ramacher, Arne Heittmann, Daniel Matolin, René Schüffny
Cellular pulse-coupled neural network with adaptive weights for image segmentation and its VLSI implementation. Image Processing: Algorithms and Systems (2004)
Jörg Schreiter, Ulrich Ramacher, Arne Heittmann, Daniel Matolin, René Schüffny
Pulse coupled neural networks with adaptive synapses for image segmentation. ARCS Workshops (2004)
Arne Heittmann, Ulrich Ramacher
Correlation-based feature detection using pulsed neural networks. NNSP (2003)
Jörg Schreiter, Ulrich Ramacher, Arne Heittmann, D. Matolini, René Schüffny
Analog implementation for networks of integrate-and-fire neurons with adaptive local connectivity. NNSP (2002)
Arne Heittmann, Ulrich Ramacher, Daniel Matolin, Jörg Schreiter, René Schüffny
An Analog VLSI Pulsed Neural Network for Image Segmentation Using Adaptive Connection Weights. ICANN (2002)

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Publication Activity (10 Years)

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Arne Heittmann