A hybrid CMOS/memristive nanoelectronic circuit for programming synaptic weights.

Arne Heittmann Tobias G. Noll

Published in: ESANN (2012)

Keyphrases

circuit design
high speed
analog vlsi
delay insensitive
synaptic weights
cmos technology
low voltage
low power
floating gate
biologically plausible
spiking neurons
data sets
neural network
object recognition
evolutionary algorithm
neural network model