3D Chip Stack Technology Using Through-Chip Interconnects.
Peter BenkartAlexander KaiserAndreas MundingMarkus BschorrHans-Jörg PfleidererErhard KohnArne HeittmannHolger HuebnerUlrich RamacherPublished in: IEEE Des. Test Comput. (2005)
Keyphrases
- cmos technology
- high speed
- low cost
- nm technology
- power dissipation
- high density
- programmable logic
- analog vlsi
- low power
- ibm zenterprise
- input output
- power consumption
- memory subsystem
- vlsi implementation
- solid models
- cost effective
- vlsi design
- high bandwidth
- single chip
- rapid development
- data processing
- database
- random access memory
- physical design
- host computer
- case study