Steve Temple

Publication Activity (10 Years)

Years Active: 1994-2020
Publications (10 Years): 6

Top Topics

Neural Architecture

Multicast Routing

Delay Constrained

Top Venues

IEEE Trans. Computers

Parallel Comput.

Publications

Luis A. Plana, Jim D. Garside, Jonathan Heathcote, Jeffrey Pepper, Steve Temple, Simon Davidson, Mikel Luján, Steve B. Furber
spiNNlink: FPGA-Based Interconnect for the Million-Core SpiNNaker System. IEEE Access 8 (2020)
Sebastian Höppner, Yexin Yan, Bernhard Vogginger, Andreas Dixius, Johannes Partzsch, Felix Neumärker, Stephan Hartmann, Stefan Schiefer, Stefan Scholze, Georg Ellguth, Love Cederstroem, Matthias Eberlein, Christian Mayr, Steve Temple, Luis A. Plana, Jim D. Garside, Simon Davidson, David R. Lester, Steve B. Furber
Dynamic voltage and frequency scaling for neuromorphic many-core systems. ISCAS (2017)
Amirreza Yousefzadeh, Miroslaw Jablonski, Taras Iakymchuk, Alejandro Linares-Barranco, Alfredo Rosado, Luis A. Plana, Steve Temple, Teresa Serrano-Gotarredona, Steve B. Furber, Bernabé Linares-Barranco
On Multiple AER Handshaking Channels Over High-Speed Bit-Serial Bidirectional LVDS Links With Flow-Control and Clock-Correction on Commercial FPGAs for Scalable Neuromorphic Systems. IEEE Trans. Biomed. Circuits Syst. 11 (5) (2017)
Sebastian Höppner, Yexin Yan, Bernhard Vogginger, Andreas Dixius, Johannes Partzsch, Prateek Joshi, Felix Neumärker, Stephan Hartmann, Stefan Schiefer, Stefan Scholze, Georg Ellguth, Love Cederstroem, Matthias Eberlein, Christian Mayr, Steve Temple, Luis A. Plana, Jim D. Garside, Simon Davidson, David R. Lester, Steve B. Furber
Live demonstration: Dynamic voltage and frequency scaling for neuromorphic many-core systems. ISCAS (2017)
Robert James, Jim D. Garside, Michael Hopkins, Luis A. Plana, Steve Temple, Simon Davidson, Steve B. Furber
Parallel distribution of an inner hair cell and auditory nerve model for real-time application. BioCAS (2017)
Amirreza Yousefzadeh, Luis A. Plana, Steve Temple, Teresa Serrano-Gotarredona, Steve B. Furber, Bernabé Linares-Barranco
Fast Predictive Handshaking in Synchronous FPGAs for Fully Asynchronous Multisymbol Chip Links: Application to SpiNNaker 2-of-7 Links. IEEE Trans. Circuits Syst. II Express Briefs (8) (2016)
Andrew D. Brown, Stephen B. Furber, Jeffrey S. Reeve, Jim D. Garside, Kier J. Dugan, Luis A. Plana, Steve Temple
SpiNNaker - Programming Model. IEEE Trans. Computers 64 (6) (2015)
Javier Navaridas, Mikel Luján, Luis A. Plana, Steve Temple, Steve B. Furber
SpiNNaker: Enhanced multicast routing. Parallel Comput. 45 (2015)
Steve B. Furber, Francesco Galluppi, Steve Temple, Luis A. Plana
The SpiNNaker Project. Proc. IEEE 102 (5) (2014)
Javier Navaridas, Mikel Luján, Luis A. Plana, Steve Temple, Steve B. Furber
On generating multicast routes for SpiNNaker. Conf. Computing Frontiers (2014)
Alexander D. Rast, Johannes Partzsch, Christian Mayr, Johannes Schemmel, Stefan Hartmann, Luis A. Plana, Steve Temple, David R. Lester, René Schüffny, Steve B. Furber
A location-independent direct link neuromorphic interface. IJCNN (2013)
Steve B. Furber, David R. Lester, Luis A. Plana, Jim D. Garside, Eustace Painkras, Steve Temple, Andrew D. Brown
Overview of the SpiNNaker System Architecture. IEEE Trans. Computers 62 (12) (2013)
Javier Navaridas, Steve B. Furber, Jim D. Garside, Xin Jin, Mukaram M. Khan, David R. Lester, Mikel Luján, José Miguel-Alonso, Eustace Painkras, Cameron Patterson, Luis A. Plana, Alexander D. Rast, Dominic Richards, Yebin Shi, Steve Temple, Jian Wu, Shufan Yang
SpiNNaker: Fault tolerance in a power- and area- constrained large-scale neuromimetic architecture. Parallel Comput. 39 (11) (2013)
Eustace Painkras, Luis A. Plana, Jim D. Garside, Steve Temple, Francesco Galluppi, Cameron Patterson, David R. Lester, Andrew D. Brown, Steve B. Furber
SpiNNaker: A 1-W 18-Core System-on-Chip for Massively-Parallel Neural Network Simulation. IEEE J. Solid State Circuits 48 (8) (2013)
Jim D. Garside, Stephen B. Furber, Steve Temple, David M. Clark, Luis A. Plana
An Asynchronous Fully Digital Delay Locked Loop for DDR SDRAM Data Recovery. ASYNC (2012)
Cameron Patterson, Jim D. Garside, Eustace Painkras, Steve Temple, Luis A. Plana, Javier Navaridas, Thomas Sharp, Steve B. Furber
Scalable communications for a million-core neural processing architecture. J. Parallel Distributed Comput. 72 (11) (2012)
Eustace Painkras, Luis A. Plana, Jim D. Garside, Steve Temple, Simon Davidson, Jeffrey Pepper, David M. Clark, Cameron Patterson, Steve B. Furber
SpiNNaker: A multi-core System-on-Chip for massively-parallel neural net simulation. CICC (2012)
Mukaram M. Khan, Alexander D. Rast, Javier Navaridas, X. Jin, Luis A. Plana, Mikel Luján, Steve Temple, Cameron Patterson, Dominic Richards, John V. Woods, José Miguel-Alonso, Stephen B. Furber
Event-driven configuration of a neural network CMP system over an homogeneous interconnect fabric. Parallel Comput. 37 (8) (2011)
Luis A. Plana, David M. Clark, Simon Davidson, Steve B. Furber, Jim D. Garside, Eustace Painkras, Jeffrey Pepper, Steve Temple, John Bainbridge
SpiNNaker: Design and Implementation of a GALS Multicore System-on-Chip. ACM J. Emerg. Technol. Comput. Syst. 7 (4) (2011)
Xin Jin, Francesco Galluppi, Cameron Patterson, Alexander D. Rast, Sergio Davies, Steve Temple, Steve B. Furber
Algorithm and software for simulation of spiking neural networks on the multi-chip SpiNNaker system. IJCNN (2010)
Xin Jin, Mikel Luján, Luis A. Plana, Sergio Davies, Steve Temple, Steve B. Furber
Modeling Spiking Neural Networks on SpiNNaker. Comput. Sci. Eng. 12 (5) (2010)
Jim D. Garside, Stephen B. Furber, Steve Temple, Viv Woods
The Amulet chips: Architectural development for asynchronous microprocessors. ICECS (2009)
Luis A. Plana, Stephen B. Furber, Steve Temple, Muhammad Mukaram Khan, Yebin Shi, Jian Wu, Shufan Yang
A GALS Infrastructure for a Massively Parallel Multiprocessor. IEEE Des. Test Comput. 24 (5) (2007)
Stephen B. Furber, Steve Temple, Andrew D. Brown
On-chip and inter-chip networks for modeling large-scale neural systems. ISCAS (2006)
Stephen B. Furber, John Bainbridge, J. Mike Cumpstey, Steve Temple
codes. Neural Networks 17 (10) (2004)
Luis A. Plana, Peter A. Riocreux, W. J. Bainbridge, Andrew Bardsley, Steve Temple, Jim D. Garside, Z. C. Yu
SPA - a secure Amulet core for smartcard applications. Microprocess. Microsystems 27 (9) (2003)
W. J. Bainbridge, Andrew Bardsley, Steve Temple, Jim D. Garside, Peter A. Riocreux, Luis A. Plana
SPA - A Synthesisable Amulet Core for Smartcard pplications. ASYNC (2002)
Stephen B. Furber, Aristides Efthymiou, Jim D. Garside, David W. Lloyd, Mike J. G. Lewis, Steve Temple
Power Management in the Amulet Microprocessors. IEEE Des. Test Comput. 18 (2) (2001)
Jim D. Garside, W. J. Bainbridge, Andrew Bardsley, David M. Clark, David A. Edwards, Stephen B. Furber, David W. Lloyd, Siamak Mohammadi, J. S. Pepper, Steve Temple, John V. Woods, Jianwei Liu, O. Petli
AMULET3i - An Asynchronous System-on-Chip. ASYNC (2000)
Stephen B. Furber, James Garside, Peter A. Riocreux, Steve Temple, Paul Day, Jianwei Liu, Nigel C. Paver
AMULET2e: an asynchronous embedded controller. Proc. IEEE 87 (2) (1999)
Stephen B. Furber, Jim D. Garside, Steve Temple, Paul Day, Nigel C. Paver
Asynchronous Embedded Control. Integr. Comput. Aided Eng. 5 (1) (1998)
Stephen B. Furber, Jim D. Garside, Steve Temple, Jianwei Liu, Paul Day, N. C. Paver
AMULET2e: An Asynchronous Embedded Controller. ASYNC (1997)
John V. Woods, Paul Day, Stephen B. Furber, Jim D. Garside, N. C. Paver, Steve Temple
AMULET1: A Asynchronous ARM Microprocessor. IEEE Trans. Computers 46 (4) (1997)
Jim D. Garside, Steve Temple, Rahul Mehra
The AMULET2e cache system. ASYNC (1996)
Stephen B. Furber, Paul Day, Jim D. Garside, N. C. Paver, Steve Temple, John V. Woods
The Design and Evaluation of an Asynchronous Microprocessor. ICCD (1994)