A Low-Power Scalable Signal Processing Chip Platform for 5G and Beyond - Kachel.
Gerhard P. FettweisMattis HaslerRobert WittigEmil MatúsStefan A. DamjancevicSebastian HaasFriedrich PaulsSeungseok NamNairuhi GrigoryanPublished in: ACSSC (2019)
Keyphrases
- low power
- signal processing
- signal processor
- high speed
- low cost
- single chip
- digital signal processing
- mixed signal
- low power consumption
- cmos technology
- power consumption
- real time
- power dissipation
- ultra low power
- high power
- image sensor
- image processing
- nm technology
- hardware implementation
- vlsi circuits
- pattern recognition
- vlsi architecture
- power reduction
- gate array
- wireless transmission
- filter bank
- logic circuits
- digital camera
- cmos image sensor
- hardware and software
- highly efficient
- wide dynamic range
- design considerations