José María Llabería

Publication Activity (10 Years)

Years Active: 1983-2024
Publications (10 Years): 3

Top Topics

Memory Management

Detection Algorithm

Knowledge Reuse

Top Venues

Publications

Roberto Rodríguez-Rodríguez, Javier Díaz, Fernando Castro, Pablo Ibáñez, Daniel Chaver, Víctor Viñals, Juan Carlos Saez, Manuel Prieto-Matias, Luis Pinuel, Teresa Monreal, José María Llabería
Reuse Detector: Improving the Management of STT-RAM SLLCs. CoRR (2024)
Carlos Escuin, Fernando García-Redondo, Mahdi Zahedi, Pablo Ibáñez, Teresa Monreal, Víctor Viñals, José María Llabería, James Myers, Julien Ryckaert, Dwaipayan Biswas, Francky Catthoor
MNEMOSENE++: Scalable Multi-Tile Design with Enhanced Buffering and VGSOT-MRAM based Compute-in-Memory Crossbar Array. ICECS (2023)
Roberto Rodríguez-Rodríguez, Javier Díaz, Fernando Castro, Pablo Ibáñez, Daniel Chaver, Víctor Viñals, Juan Carlos Saez, Manuel Prieto-Matías, Luis Piñuel, Teresa Monreal Arnal, José María Llabería
Reuse Detector: Improving the Management of STT-RAM SLLCs. Comput. J. 61 (6) (2018)
Jorge Albericio, Pablo Ibáñez, Víctor Viñals, José María Llabería
Exploiting reuse locality on inclusive shared last-level caches. ACM Trans. Archit. Code Optim. 9 (4) (2013)
Jorge Albericio, Ruben Gran Tejero, Pablo Ibáñez, Víctor Viñals, José María Llabería
ABS: A low-cost adaptive controller for prefetching in a banked shared last-level cache. ACM Trans. Archit. Code Optim. 8 (4) (2012)
Benjamin Sahelices, Agustín De Dios Hernández, Pablo Ibáñez, Víctor Viñals Yúfera, José María Llabería
Effcient Handling of Lock Hand-off in DSM Multiprocessors with Buffering Coherence Controllers. J. Comput. Sci. Technol. 27 (1) (2012)
Ana Bosque, Víctor Viñals, Pablo Ibáñez, José María Llabería
Filtering Directory Lookups in CMPs with Write-Through Caches. Euro-Par (1) (2011)
Benjamin Sahelices, Pablo Ibáñez, Víctor Viñals, José María Llabería
A Methodology to Characterize Critical Section Bottlenecks in DSM Multiprocessors. Euro-Par (2009)
Enrique F. Torres, Pablo Ibáñez, Víctor Viñals Yúfera, José María Llabería
Store Buffer Design for Multibanked Data Caches. IEEE Trans. Computers 58 (10) (2009)
Ruben Gran Tejero, Enric Morancho, Àngel Olivé, José María Llabería
On reducing misspeculations in a pipelined scheduler. IPDPS (2009)
Enric Morancho, José María Llabería, Àngel Olivé
On reducing energy-consumption by late-inserting instructions into the issue queue. ISLPED (2007)
Enric Morancho, José María Llabería, Àngel Olivé
A comparison of two policies for issuing instructions speculatively. J. Syst. Archit. 53 (4) (2007)
Ana Bosque, Pablo Ibáñez, Víctor Viñals, Per Stenström, José María Llabería
Characterization of Apache web server with Specweb2005. MEDEA@PACT (2007)
Ruben Gran Tejero, Enric Morancho, Àngel Olivé, José María Llabería
An Enhancement for a Scheduling Logic Pipelined over two Cycles . ICCD (2006)
María Jesús Garzarán, Milos Prvulovic, José María Llabería, Víctor Viñals, Lawrence Rauchwerger, Josep Torrellas
Tradeoffs in buffering speculative memory state for thread-level speculation in multiprocessors. ACM Trans. Archit. Code Optim. 2 (3) (2005)
Enrique F. Torres, Pablo Ibáñez, Víctor Viñals, José María Llabería
Store Buffer Design in First-Level Multibanked Data Caches. ISCA (2005)
Enric Morancho, José María Llabería, Àngel Olivé
A Mechanism for Verifying Data Speculation. Euro-Par (2004)
Enrique F. Torres, Pablo Ibáñez, Víctor Viñals, José María Llabería
Contents Management in First-Level Multibanked Data Caches. Euro-Par (2004)
María Jesús Garzarán, Milos Prvulovic, José María Llabería, Víctor Viñals, Lawrence Rauchwerger, Josep Torrellas
Tradeoffs in Buffering Memory State for Thread-Level Speculation in Multiprocessors. HPCA (2003)
Enrique F. Torres, Pablo Ibáñez, Víctor Viñals, José María Llabería
Counteracting Bank Misprediction in Sliced First-Level Caches. Euro-Par (2003)
María Jesús Garzarán, Milos Prvulovic, Víctor Viñals, José María Llabería, Lawrence Rauchwerger, Josep Torrellas
Using Software Logging to Support Multi-Version Buffering in Thread-Level Speculation. IEEE PACT (2003)
Enric Morancho, José María Llabería, Àngel Olivé
Recovery Mechanism for Latency Misprediction. IEEE PACT (2001)
Marta Jiménez, José María Llabería, Agustín Fernández
Loop bounds computation for multilevel tiling. PDP (1998)
Anna M. del Corral, José María Llabería
Increasing the Effective Bandwidth of Complex Memory Systems in Multivector Processors. SC (1996)
Miguel Valero-García, Juan J. Navarro, José María Llabería, Mateo Valero, Tomás Lang
A method for implementation of one-dimensional systolic algorithms with data contraflow using pipelined functional units. J. VLSI Signal Process. 4 (1) (1992)
Mateo Valero, Tomás Lang, José María Llabería, Montse Peiron, Juan J. Navarro, Eduard Ayguadé
Conflict-Free Strides for Vectors in Matched Memories. Parallel Process. Lett. 1 (1991)
Agustín Fernández, José María Llabería, Juan J. Navarro, Miguel Valero-García
Performance evaluation of transputer systems with linear algebra problems. Microprocessing and Microprogramming 32 (1-5) (1991)
Antonio González, José María Llabería, Jordi Cortadella
A mechanism for reducing the cost of branches in RISC architectures. Microprocess. Microprogramming 24 (1-5) (1988)
Mateo Valero, José María Llabería, Jesús Labarta, Emilio Sanvicente, Tomás Lang
A performance evaluation of the multiple bus network for multiprocessor systems. SIGMETRICS (1983)