Retrospective: Instruction Issue Logic for High-Performance, Interruptable Pipelined Processors.
Gurindar S. SohiPublished in: 25 Years ISCA: Retrospectives and Reprints (1998)
Keyphrases
- instruction set
- parallel algorithm
- embedded processors
- signal processor
- parallel architecture
- classical logic
- parallel processing
- multimedia
- logic programming
- data flow
- distributed memory
- single chip
- instruction set architecture
- highly parallel
- multi valued
- modal logic
- computer software
- parallel execution
- single processor
- application specific
- memory hierarchy
- level parallelism
- computer technology
- signal processing