T. N. Vijaykumar

ORCID

Publication Activity (10 Years)

Years Active: 1994-2024
Publications (10 Years): 24

Top Venues

CoRR

MICRO

ISCA

ACM Trans. Archit. Code Optim.

Publications

Gokulan Ravi, Xiaokang Qiu, Mithuna Thottethodi, T. N. Vijaykumar
QED: Scalable Verification of Hardware Memory Consistency. CoRR (2024)
Mingxuan He, Mithuna Thottethodi, T. N. Vijaykumar
Efficient Sparse Processing-in-Memory Architecture (ESPIM) for Machine Learning Inference. CoRR (2024)
Conor Green, Cole Nelson, Mithuna Thottethodi, T. N. Vijaykumar
SafeBet: Secure, Simple, and Fast Speculative Execution. CoRR (2023)
Ashish Gondimalla, Mithuna Thottethodi, T. N. Vijaykumar
Eureka: Efficient Tensor Cores for One-sided Unstructured Sparsity in DNN Inference. MICRO (2023)
Ashish Gondimalla, Jianqiao Liu, Mithuna Thottethodi, T. N. Vijaykumar
Occam: Optimal Data Reuse for Convolutional Neural Networks. ACM Trans. Archit. Code Optim. 20 (1) (2023)
Mingxuan He, Mithuna Thottethodi, T. N. Vijaykumar
Booster: An Accelerator for Gradient Boosting Decision Trees Training and Inference. IPDPS (2022)
Ashish Gondimalla, Sree Charan Gundabolu, T. N. Vijaykumar, Mithuna Thottethodi
Barrier-Free Large-Scale Sparse Tensor Accelerator (BARISTA) For Convolutional Neural Networks. CoRR (2021)
Tariq Mahmood, Shankaranarayanan Puzhavakath Narayanan, Sanjay G. Rao, T. N. Vijaykumar, Mithuna Thottethodi
Karma: Cost-Effective Geo-Replicated Cloud Storage with Dynamic Enforcement of Causal Consistency. IEEE Trans. Cloud Comput. 9 (1) (2021)
Sree Charan Gundabolu, T. N. Vijaykumar, Mithuna Thottethodi
FastZ: accelerating gapped whole genome alignment on GPUs. SC (2021)
Ashish Gondimalla, Jianqiao Liu, T. N. Vijaykumar, Mithuna Thottethodi
OCCAM: Optimal Data Reuse for Convolutional Neural Networks. CoRR (2021)
Jiachen Xue, Muhammad Usama Chaudhry, Balajee Vamanan, T. N. Vijaykumar, Mithuna Thottethodi
Dart: Divide and Specialize for Fast Response to Congestion in RDMA-Based Datacenter Networks. IEEE/ACM Trans. Netw. 28 (1) (2020)
Mingxuan He, Choungki Song, Ilkon Kim, Chunseok Jeong, Seho Kim, Il Park, Mithuna Thottethodi, T. N. Vijaykumar
Newton: A DRAM-maker's Accelerator-in-Memory (AiM) Architecture for Machine Learning. MICRO (2020)
Jiachen Xue, T. N. Vijaykumar, Mithuna Thottethodi
Network Interface Architecture for Remote Indirect Memory Access (RIMA) in Datacenters. ACM Trans. Archit. Code Optim. 17 (2) (2020)
Mingxuan He, T. N. Vijaykumar, Mithuna Thottethodi
Booster: An Accelerator for Gradient Boosting Decision Trees. CoRR (2020)
Ejebagom John Ojogbo, Mithuna Thottethodi, T. N. Vijaykumar
Secure automatic bounds checking: prevention is simpler than cure. CGO (2020)
Ashish Gondimalla, Noah Chesnut, Mithuna Thottethodi, T. N. Vijaykumar
SparTen: A Sparse Tensor Accelerator for Convolutional Neural Networks. MICRO (2019)
Nitin, Mithuna Thottethodi, T. N. Vijaykumar
Millipede: Die-Stacked Memory Optimizations for Big Data Machine Learning Analytics. IPDPS (2018)
Jaichen Xue, Muhammad Usama Chaudhry, Balajee Vamanan, T. N. Vijaykumar, Mithuna Thottethodi
Dart: Divide and Specialize for Fast Response to Congestion in RDMA-based Datacenter Networks. CoRR (2018)
Jaichen Xue, Muhammad Usama Chaudhry, Balajee Vamanan, T. N. Vijaykumar, Mithuna Thottethodi
Fast Congestion Control in RDMA-based Datacenter Networks. SIGCOMM Posters and Demos (2018)
Nitin, Mithuna Thottethodi, T. N. Vijaykumar, Milind Kulkarni
Efficient Collaborative Approximation in MapReduce without Missing Rare Keys. ICCAC (2017)
Ashiwan Sivakumar, Chuan Jiang, Yun Seong Nam, Shankaranarayanan Puzhavakath Narayanan, Vijay Gopalakrishnan, Sanjay G. Rao, Subhabrata Sen, Mithuna Thottethodi, T. N. Vijaykumar
NutShell: Scalable Whittled Proxy Execution for Low-Latency Web over Cellular Networks. MobiCom (2017)
Yiyang Chang, Ashkan Rezaei, Balajee Vamanan, Jahangir Hasan, Sanjay G. Rao, T. N. Vijaykumar
Exploring Functional Slicing in the Design of Distributed SDN Controllers. COMSNETS (Revised Selected Papers and Invited Papers) (2017)
Yiyang Chang, Ashkan Rezaei, Balajee Vamanan, Jahangir Hasan, Sanjay G. Rao, T. N. Vijaykumar
Hydra: Leveraging functional slicing for efficient distributed SDN controllers. COMSNETS (2017)
Yiyang Chang, Ashkan Rezaei, Balajee Vamanan, Jahangir Hasan, Sanjay G. Rao, T. N. Vijaykumar
Hydra: Leveraging Functional Slicing for Efficient Distributed SDN Controllers. CoRR (2016)
Balajee Vamanan, Hamza Bin Sohail, Jahangir Hasan, T. N. Vijaykumar
TimeTrader: exploiting latency tail to save datacenter energy for online search. MICRO (2015)
Nitin, Irith Pomeranz, T. N. Vijaykumar
FaultHound: value-locality-based soft-fault tolerance. ISCA (2015)
Hamza Bin Sohail, Balajee Vamanan, T. N. Vijaykumar
MigrantStore: Leveraging Virtual Memory in DRAM-PCM Memory Architecture. CoRR (2015)
Balajee Vamanan, Hamza Bin Sohail, Jahangir Hasan, T. N. Vijaykumar
TimeTrader: Exploiting Latency Tail to Save Datacenter Energy for On-line Data-Intensive Applications. CoRR (2015)
Faraz Ahmad, Srimat T. Chakradhar, Anand Raghunathan, T. N. Vijaykumar
ShuffleWatcher: Shuffle-aware Scheduling in Multi-tenant MapReduce Clusters. USENIX Annual Technical Conference (2014)
Gwendolyn Voskuilen, T. N. Vijaykumar
High-performance fractal coherence. ASPLOS (2014)
Gwendolyn Voskuilen, T. N. Vijaykumar
Fractal++: Closing the performance gap between fractal and conventional coherence. ISCA (2014)
Syed Ali Raza Jafri, Gwendolyn Voskuilen, T. N. Vijaykumar
Wait-n-GoTM: improving HTM performance by serializing cyclic dependencies. ASPLOS (2013)
Faraz Ahmad, Seyong Lee, Mithuna Thottethodi, T. N. Vijaykumar
MapReduce with communication overlap (MaRCO). J. Parallel Distributed Comput. 73 (5) (2013)
Balajee Vamanan, Jahangir Hasan, T. N. Vijaykumar
Deadline-aware datacenter tcp (D2TCP). SIGCOMM (2012)
Faraz Ahmad, Srimat T. Chakradhar, Anand Raghunathan, T. N. Vijaykumar
Tarazu: optimizing MapReduce on heterogeneous clusters. ASPLOS (2012)
Paolo Faraboschi, T. N. Vijaykumar
Top Picks from the 2011 Computer Architecture Conferences. IEEE Micro 32 (3) (2012)
Balajee Vamanan, T. N. Vijaykumar
TreeCAM: decoupling updates and lookups in packet classification. CoNEXT (2011)
Faraz Ahmad, T. N. Vijaykumar
Joint optimization of idle and cooling power in data centers while maintaining response time. ASPLOS (2010)
Balajee Vamanan, Gwendolyn Voskuilen, T. N. Vijaykumar
EffiCuts: optimizing packet classification for memory and throughput. SIGCOMM (2010)
Syed Ali Raza Jafri, Yu-Ju Hong, Mithuna Thottethodi, T. N. Vijaykumar
Adaptive Flow Control for Robust Performance and Energy. MICRO (2010)
Syed Ali Raza Jafri, Mithuna Thottethodi, T. N. Vijaykumar
LiteTM: Reducing transactional state overhead. HPCA (2010)
Gwendolyn Voskuilen, Faraz Ahmad, T. N. Vijaykumar
Timetraveler: exploiting acyclic races for optimizing memory race recording. ISCA (2010)
Eric Chun, Zeshan Chishti, T. N. Vijaykumar
Shapeshifter: Dynamically changing pipeline width and speed to address process variations. MICRO (2008)
Zeshan Chishti, T. N. Vijaykumar
Optimal Power/Performance Pipeline Depth for SMT in Scaled Technologies. IEEE Trans. Computers 57 (1) (2008)
Ahmed M. Amin, Mithuna Thottethodi, T. N. Vijaykumar, Steven Wereley, Stephen C. Jacobson
Automatic volume management for programmable microfluidics. PLDI (2008)
Ahmed M. Amin, Mithuna Thottethodi, T. N. Vijaykumar, Steven Wereley, Stephen C. Jacobson
Aquacore: a programmable architecture for microfluidics. ISCA (2007)
Ethan Schuchman, T. N. Vijaykumar
BlackJack: Hard Error Detection with Redundant Threads on SMT. DSN (2007)
Troy A. Johnson, Rudolf Eigenmann, T. N. Vijaykumar
Speculative thread decomposition through empirical optimization. PPOPP (2007)
Michael D. Powell, T. N. Vijaykumar
Resource area dilation to reduce power density in throughput servers. ISLPED (2007)
Seon Wook Kim, Chong-liang Ooi, Rudolf Eigenmann, Babak Falsafi, T. N. Vijaykumar
Exploiting reference idempotency to reduce speculative storage overflow. ACM Trans. Program. Lang. Syst. 28 (5) (2006)
Alan Fern, Robert Givan, Babak Falsafi, T. N. Vijaykumar
Dynamic feature selection for hardware prediction. J. Syst. Archit. 52 (4) (2006)
Hilmi Ozdoganoglu, T. N. Vijaykumar, Carla E. Brodley, Benjamin A. Kuperman, Ankit Jalote
SmashGuard: A Hardware Solution to Prevent Security Attacks on the Function Return Address. IEEE Trans. Computers 55 (10) (2006)
Jin-Yi Wang, Yen-Shiang Shue, T. N. Vijaykumar, Saurabh Bagchi
Pesticide: Using SMT Processors to Improve Performance of Pointer Bug Detection. ICCD (2006)
Ethan Schuchman, T. N. Vijaykumar
A program transformation and architecture support for quantum uncomputation. ASPLOS (2006)
Chen-Yong Cher, Il Park, T. N. Vijaykumar
Do Trace Cache, Value Prediction and Prefetching Improve SMT Throughput?. ARCS (2006)
Mohamed A. Gomaa, T. N. Vijaykumar
Opportunistic Transient-Fault Detection. IEEE Micro 26 (1) (2006)
Hai Li, Chen-Yong Cher, Kaushik Roy, T. N. Vijaykumar
Combined circuit and architectural level variable supply-voltage scaling for low power. IEEE Trans. Very Large Scale Integr. Syst. 13 (5) (2005)
Mohamed A. Gomaa, T. N. Vijaykumar
Opportunistic Transient-Fault Detection. ISCA (2005)
Benjamin A. Kuperman, Carla E. Brodley, Hilmi Ozdoganoglu, T. N. Vijaykumar, Ankit Jalote
Detection and prevention of stack buffer overflow attacks. Commun. ACM 48 (11) (2005)
Ethan Schuchman, T. N. Vijaykumar
Rescue: A Microarchitecture for Testability and Defect Tolerance. ISCA (2005)
Michael D. Powell, Ethan Schuchman, T. N. Vijaykumar
Balancing Resource Utilization to Mitigate Power Density in Processor Pipelines. MICRO (2005)
Jahangir Hasan, T. N. Vijaykumar
Dynamic pipelining: making IP-lookup truly scalable. SIGCOMM (2005)
Zeshan Chishti, Michael D. Powell, T. N. Vijaykumar
Optimizing Replication, Communication, and Capacity Allocation in CMPs. ISCA (2005)
Jahangir Hasan, Ankit Jalote, T. N. Vijaykumar, Carla E. Brodley
Heat Stroke: Power-Density-Based Denial of Service in SMT. HPCA (2005)
Hai Li, Swarup Bhunia, Yiran Chen, Kaushik Roy, T. N. Vijaykumar
DCG: deterministic clock-gating for low-power microprocessor design. IEEE Trans. Very Large Scale Integr. Syst. 12 (3) (2004)
Chen-Yong Cher, Antony L. Hosking, T. N. Vijaykumar
Software prefetching for mark-sweep garbage collection: hardware analysis and software redesign. ASPLOS (2004)
Mohamed A. Gomaa, Michael D. Powell, T. N. Vijaykumar
Heat-and-run: leveraging SMT and CMP to manage power density through the operating system. ASPLOS (2004)
T. N. Vijaykumar, Zeshan Chishti
Wire Delay is Not a Problem for SMT (In the Near Future). ISCA (2004)
Michael D. Powell, T. N. Vijaykumar
Exploiting Resonant Behavior to Reduce Inductive Noise. ISCA (2004)
Troy A. Johnson, Rudolf Eigenmann, T. N. Vijaykumar
Min-cut program decomposition for thread-level speculation. PLDI (2004)
Jahangir Hasan, Satish Chandra, T. N. Vijaykumar
Efficient Use of Memory Bandwidth to Improve Network Processor Throughput. ISCA (2003)
Zeshan Chishti, Michael D. Powell, T. N. Vijaykumar
Distance Associativity for High-Performance Energy-Efficient Non-Uniform Cache Architectures. MICRO (2003)
Il Park, Babak Falsafi, T. N. Vijaykumar
Iimplicitly-Multithreaded Processors. ISCA (2003)
Amit Agarwal, Kaushik Roy, T. N. Vijaykumar
Exploring High Bandwidth Pipelined Cache Architecture for Scaled Technology. DATE (2003)
Mohamed A. Gomaa, Chad Scarbrough, T. N. Vijaykumar, Irith Pomeranz
Transient-Fault Recovery for Chip Multiprocessors. IEEE Micro 23 (6) (2003)
Mohamed A. Gomaa, Chad Scarbrough, Irith Pomeranz, T. N. Vijaykumar
Transient-Fault Recovery for Chip Multiprocessors. ISCA (2003)
Hai Li, Swarup Bhunia, Yiran Chen, T. N. Vijaykumar, Kaushik Roy
Deterministic Clock Gating for Microprocessor Power Reduction. HPCA (2003)
Michael D. Powell, T. N. Vijaykumar
Pipeline Damping: A Microarchitectural Technique to Reduce Inductive Noise in Supply Voltage. ISCA (2003)
Il Park, Chong-liang Ooi, T. N. Vijaykumar
Reducing Design Complexity of the Load/Store Queue. MICRO (2003)
Hai Li, Chen-Yong Cher, T. N. Vijaykumar, Kaushik Roy
VSV: L2-Miss-Driven Variable Supply-Voltage Scaling for Low Power. MICRO (2003)
Michael D. Powell, T. N. Vijaykumar
Pipeline muffling and a priori current ramping: architectural techniques to reduce high-frequency inductive noise. ISLPED (2003)
Praveen Dongara, T. N. Vijaykumar
Accelerating private-key cryptography via multithreading on symmetric multiprocessors. ISPASS (2003)
Se-Hyun Yang, Michael D. Powell, Babak Falsafi, T. N. Vijaykumar
Exploiting Choice in Resizable Cache Design to Optimize Deep-Submicron Processor Energy-Delay. HPCA (2002)
T. N. Vijaykumar, Irith Pomeranz, Karl Cheng
Transient-Fault Recovery Using Simultaneous Multithreading. ISCA (2002)
Il Park, Michael D. Powell, T. N. Vijaykumar
Reducing register ports for higher speed and lower energy. MICRO (2002)
Brannon Batson, T. N. Vijaykumar
Reactive-Associative Caches. IEEE PACT (2001)
Chen-Yong Cher, T. N. Vijaykumar
Skipper: a microarchitecture for exploiting control-flow independence. MICRO (2001)
T. N. Vijaykumar, Sridhar Gopal, James E. Smith, Gurindar S. Sohi
Speculative Versioning Cache. IEEE Trans. Parallel Distributed Syst. 12 (12) (2001)
Michael D. Powell, Amit Agarwal, T. N. Vijaykumar, Babak Falsafi, Kaushik Roy
Reducing set-associative cache energy via way-prediction and selective direct-mapping. MICRO (2001)
Michael D. Powell, Se-Hyun Yang, Babak Falsafi, Kaushik Roy, T. N. Vijaykumar
Reducing leakage in a high-performance deep-submicron instruction cache. IEEE Trans. Very Large Scale Integr. Syst. 9 (1) (2001)
Chong-liang Ooi, Seon Wook Kim, Il Park, Rudolf Eigenmann, Babak Falsafi, T. N. Vijaykumar
Multiplex: unifying conventional and speculative thread-level parallelism on a chip multiprocessor. ICS (2001)
Se-Hyun Yang, Michael D. Powell, Babak Falsafi, Kaushik Roy, T. N. Vijaykumar
An Integrated Circuit/Architecture Approach to Reducing Leakage in Deep-Submicron High-Performance I-Caches. HPCA (2001)
Seon Wook Kim, Chong-liang Ooi, Rudolf Eigenmann, Babak Falsafi, T. N. Vijaykumar
Reference idempotency analysis: a framework for optimizing speculative execution. PPOPP (2001)
Michael D. Powell, Se-Hyun Yang, Babak Falsafi, Kaushik Roy, T. N. Vijaykumar
: a circuit technique to reduce leakage in deep-submicron cache memories ISLPED (2000)
Chris Gniady, Babak Falsafi, T. N. Vijaykumar
Is SC + ILP=RC? ISCA (1999)
T. N. Vijaykumar, Gurindar S. Sohi
Task Selection for the Multiscalar Architecture. J. Parallel Distributed Comput. 58 (2) (1999)
T. N. Vijaykumar, Gurindar S. Sohi
Task Selection for a Multiscalar Processor. MICRO (1998)
Sridhar Gopal, T. N. Vijaykumar, James E. Smith, Gurindar S. Sohi
Speculative Versioning Cache. HPCA (1998)
Gurindar S. Sohi, Scott E. Breach, T. N. Vijaykumar
Multiscalar Processors. 25 Years ISCA: Retrospectives and Reprints (1998)
Andreas Moshovos, Scott E. Breach, T. N. Vijaykumar, Gurindar S. Sohi
Dynamic Speculation and Synchronization of Data Dependences. ISCA (1997)

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Publication Activity (10 Years)

Top Topics

Top Venues

T. N. Vijaykumar