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: a circuit technique to reduce leakage in deep-submicron cache memories
Michael D. Powell
Se-Hyun Yang
Babak Falsafi
Kaushik Roy
T. N. Vijaykumar
Published in:
ISLPED (2000)
Keyphrases
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vlsi circuits
prefetching
significantly reduced
high speed
main memory
data access
low power
database
genetic algorithm
data structure
evolutionary algorithm
analog circuits