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Exploiting Choice in Resizable Cache Design to Optimize Deep-Submicron Processor Energy-Delay.

Se-Hyun YangMichael D. PowellBabak FalsafiT. N. Vijaykumar
Published in: HPCA (2002)
Keyphrases
  • memory hierarchy
  • case study
  • design process
  • design space
  • single chip
  • functional verification
  • user interface
  • query processing
  • energy minimization