Leibin Ni

Publication Activity (10 Years)

Years Active: 2015-2024
Publications (10 Years): 21

Top Topics

Error Compensation

Logic Synthesis

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Haobo Liu, Zhengyang Qian, Wei Wu, Hongwei Ren, Zhiwei Liu, Leibin Ni
AFPR-CIM: An Analog-Domain Floating-Point RRAM-based Compute-In-Memory Architecture with Dynamic Range Adaptive FP-ADC. CoRR (2024)
Haobo Liu, Zhengyang Qian, Wei Wu, Hongwei Ren, Zhiwei Liu, Leibin Ni
AFPR-CIM: An Analog-Domain Floating-Point RRAM -based Compute- In- Memory Architecture with Dynamic Range Adaptive FP-ADC. DATE (2024)
Laimin Du, Leibin Ni, Xiong Liu, Guanqi Peng, Kai Li, Wei Mao, Hao Yu
A Low-Power DNN Accelerator With Mean-Error-Minimized Approximate Signed Multiplier. IEEE Open J. Circuits Syst. 5 (2024)
Xingyue Qian, Chang Meng, Xiaolong Shen, Junfeng Zhao, Leibin Ni, Weikang Qian
High-accuracy Low-power Reconfigurable Architectures for Decomposition-based Approximate Lookup Table. DATE (2023)
Sanbao Su, Chang Meng, Fan Yang, Xiaolong Shen, Leibin Ni, Wei Wu, Zhihang Wu, Junfeng Zhao, Weikang Qian
VECBEE: A Versatile Efficiency-Accuracy Configurable Batch Error Estimation Method for Greedy Approximate Logic Synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (11) (2022)
Chang Meng, Xuan Wang, Jiajun Sun, Sijun Tao, Wei Wu, Zhihang Wu, Leibin Ni, Xiaolong Shen, Junfeng Zhao, Weikang Qian
SEALS: sensitivity-driven efficient approximate logic synthesis. DAC (2022)
Laimin Du, Leibin Ni, Xiong Liu, Wei Mao, Hao Yu
A Low-Power Approximate Multiplier with Sign-Focus Compressor and Error Compensation. APCCAS (2022)
Zhe Zhang, Jan Lappas, André Lucas Chinazzo, Christian Weis, Zhihang Wu, Leibin Ni, Norbert Wehn, Mehdi B. Tahoori
Machine learning based soft error rate estimation of pass transistor logic in high-speed communication. ETS (2022)
Jan Lappas, André Lucas Chinazzo, Christian Weis, Chenyang Xia, Zhihang Wu, Leibin Ni, Norbert Wehn
Revisiting Pass-Transistor Logic Styles in a 12nm FinFET Technology Node. DATE (2022)
André Lucas Chinazzo, Jan Lappas, Christian Weis, Qinhui Huang, Zhihang Wu, Leibin Ni, Norbert Wehn
Investigation of Pass Transistor Logic in a 12nm FinFET CMOS Technology. ICECS 2022 (2022)
Yuan Cheng, Ngai Wong, Xiong Liu, Leibin Ni, Hai-Bao Chen, Hao Yu
A Low-Power High-Throughput In-Memory CMOS-ReRAM Accelerator for Large-Scale Deep Residual Neural Networks. ASICON (2019)
Hantao Huang, Leibin Ni, Hao Yu
LTNN: An energy-efficient machine learning accelerator on 3D CMOS-RRAM for layer-wise tensorized neural network. SoCC (2017)
Leibin Ni, Zichuan Liu, Wenhao Song, J. Joshua Yang, Hao Yu, Kanwen Wang, Yuangang Wang
An energy-efficient and high-throughput bitwise CNN on sneak-path-free digital ReRAM crossbar. ISLPED (2017)
Leibin Ni, Hantao Huang, Zichuan Liu, Rajiv V. Joshi, Hao Yu
Distributed In-Memory Computing on Binary RRAM Crossbar. ACM J. Emerg. Technol. Comput. Syst. 13 (3) (2017)
Leibin Ni, Yuhao Wang, Hao Yu, Wei Yang, Chuliang Weng, Junfeng Zhao
An energy-efficient matrix multiplication accelerator by distributed in-memory computing on binary RRAM crossbar. ASP-DAC (2016)
Hantao Huang, Leibin Ni, Yuhao Wang, Hao Yu, Zongwei Wang, Yimao Cai, Ru Huang
A 3D multi-layer CMOS-RRAM accelerator for neural network. 3DIC (2016)
Yuhao Wang, Leibin Ni, Chip-Hong Chang, Hao Yu
DW-AES: A Domain-Wall Nanowire-Based AES for High Throughput and Energy-Efficient Data Encryption in Non-Volatile Memory. IEEE Trans. Inf. Forensics Secur. 11 (11) (2016)
Leibin Ni, Hantao Huang, Hao Yu
On-line machine learning accelerator on digital RRAM-crossbar. ISCAS (2016)
Leibin Ni, Hantao Huang, Hao Yu
A memristor network with coupled oscillator and crossbar towards L2-norm based machine learning. NANOARCH (2016)
Suman Deb, Leibin Ni, Hao Yu, Anupam Chattopadhyay
Racetrack memory-based encoder/decoder for low-power interconnect architectures. SAMOS (2016)
Leibin Ni, Sai Manoj P. D., Yang Song, Chenjie Gu, Hao Yu
A Zonotoped Macromodeling for Eye-Diagram Verification of High-Speed I/O Links With Jitter and Parameter Variations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35 (6) (2016)
Yuhao Wang, Xin Li, Hao Yu, Leibin Ni, Wei Yang, Chuliang Weng, Junfeng Zhao
Optimizing Boolean embedding matrix for compressive sensing in RRAM crossbar. ISLPED (2015)
Yuhao Wang, Hantao Huang, Leibin Ni, Hao Yu, Mei Yan, Chuliang Weng, Wei Yang, Junfeng Zhao
An energy-efficient non-volatile in-memory accelerator for sparse-representation based face recognition. DATE (2015)