A Low-Power Approximate Multiplier with Sign-Focus Compressor and Error Compensation.

Laimin Du Leibin Ni Xiong Liu Wei Mao Hao Yu

Published in: APCCAS (2022)

Keyphrases

low power
error compensation
power consumption
low cost
high speed
single chip
high power
digital signal processing
low power consumption
cmos technology
vlsi architecture
wireless transmission
vlsi circuits
logic circuits
real time
delay insensitive
multiscale