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A Low-Power DNN Accelerator With Mean-Error-Minimized Approximate Signed Multiplier.
Laimin Du
Leibin Ni
Xiong Liu
Guanqi Peng
Kai Li
Wei Mao
Hao Yu
Published in:
IEEE Open J. Circuits Syst. (2024)
Keyphrases
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low power
power consumption
high speed
low cost
high power
single chip
digital signal processing
wireless transmission
low power consumption
logic circuits
vlsi architecture
vlsi circuits
floating point
mixed signal
parallel implementation
signal processor
real time
power dissipation
general purpose
image processing