Pascal Vivet

ORCID

Publication Activity (10 Years)

Years Active: 1998-2023
Publications (10 Years): 34

Top Venues

Publications

Thomas Dalgaty, Thomas Mesquida, Damien Joubert, Amos Sironi, Cyrille Soubeyrat, Pascal Vivet, Christoph Posch
The CNN vs. SNN Event-camera Dichotomy and Perspectives For Event-Graph Neural Networks. DATE (2023)
Thomas Dalgaty, Thomas Mesquida, Damien Joubert, Amos Sironi, Pascal Vivet, Christoph Posch
HUGNet: Hemi-Spherical Update Graph Neural Network applied to low-latency event-based optical flow. CVPR Workshops (2023)
Thomas Mesquida, Manon Dampfhoffer, Thomas Dalgaty, Pascal Vivet, Amos Sironi, Christoph Posch
G2N2: Lightweight Event Stream Classification with GRU Graph Neural Networks. BMVC (2023)
Aditya Narayan, Yvain Thonnart, Pascal Vivet, Ayse K. Coskun, Ajay Joshi
Architecting Optically Controlled Phase Change Memory. ACM Trans. Archit. Code Optim. 19 (4) (2022)
Pascal Vivet, Eric Guthmuller, Yvain Thonnart, Gaël Pillonnet, César Fuguet Tortolero, Ivan Miro-Panades, Guillaume Moritz, Jean Durupt, Christian Bernard, Didier Varreau, Julian J. H. Pontes, Sébastien Thuries, David Coriat, Michel Harrand, Denis Dutoit, Didier Lattard, Lucile Arnaud, Jean Charbonnier, Perceval Coudrain, Arnaud Garnier, Frédéric Berger, Alain Gueugnot, Alain Greiner, Quentin L. Meunier, Alexis Farcy, Alexandre Arriordaz, Séverine Cheramy, Fabien Clermidy
IntAct: A 96-Core Processor With Six Chiplets 3D-Stacked on an Active Interposer With Distributed Interconnects and Integrated Power Management. IEEE J. Solid State Circuits 56 (1) (2021)
Aditya Narayan, Yvain Thonnart, Pascal Vivet, Ayse K. Coskun
PROWAVES: Proactive Runtime Wavelength Selection for Energy-Efficient Photonic NoCs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40 (10) (2021)
Aditya Narayan, Yvain Thonnart, Pascal Vivet, Ayse K. Coskun, Ajay Joshi
Architecting Optically-Controlled Phase Change Memory. CoRR (2021)
Pascal Vivet, Eric Guthmuller, Yvain Thonnart, Gaël Pillonnet, Guillaume Moritz, Ivan Miro-Panades, César Fuguet Tortolero, Jean Durupt, Christian Bernard, Didier Varreau, Julian J. H. Pontes, Sébastien Thuries, David Coriat, Michel Harrand, Denis Dutoit, Didier Lattard, Lucile Arnaud, Jean Charbonnier, Perceval Coudrain, Arnaud Garnier, Frédéric Berger, Alain Gueugnot, Alain Greiner, Quentin L. Meunier, Alexis Farcy, Alexandre Arriordaz, Séverine Cheramy, Fabien Clermidy
@ 82%-Peak-Efficiency DC-DC Converters. ISSCC (2020)
Roman Gauchi, Valentin Egloff, Maha Kooli, Jean-Philippe Noël, Bastien Giraud, Pascal Vivet, Subhasish Mitra, H.-P. Charles
Reconfigurable tiles of computing-in-memory SRAM architecture for scalable vectorization. ISLPED (2020)
Sébastien Thuries, Olivier Billoint, Sylvain Choisnet, Romain Lemaire, Pascal Vivet, Perrine Batude, Didier Lattard
M3D-ADTCO: Monolithic 3D Architecture, Design and Technology Co-Optimization for High Energy Efficient 3D IC. DATE (2020)
Yvain Thonnart, Stéphane Bernabé, Jean Charbonnier, Christian Bernard, David Coriat, César Fuguet Tortolero, Pierre Tissier, Benoît Charbonnier, Stéphane Malhouitre, Damien Saint-Patrice, Myriam Assous, Aditya Narayan, Ayse K. Coskun, Denis Dutoit, Pascal Vivet
POPSTAR: a Robust Modular Optical NoC Architecture for Chiplet-based 3D Integrated Systems. DATE (2020)
Aditya Narayan, Yvain Thonnart, Pascal Vivet, Ajay Joshi, Ayse K. Coskun
System-level Evaluation of Chip-Scale Silicon Photonic Networks for Emerging Data-Intensive Applications. DATE (2020)
Jean-Philippe Noël, Valentin Egloff, Maha Kooli, Roman Gauchi, Jean-Michel Portal, H.-P. Charles, Pascal Vivet, Bastien Giraud
Computational SRAM Design Automation using Pushed-Rule Bitcells for Energy-Efficient Vector Processing. DATE (2020)
Roman Gauchi, Maha Kooli, Pascal Vivet, Jean-Philippe Noël, Edith Beigné, Subhasish Mitra, H.-P. Charles
Memory Sizing of a Scalable SRAM In-Memory Computing Tile Based Architecture. VLSI-SoC (2019)
Deepak M. Mathew, André Lucas Chinazzo, Christian Weis, Matthias Jung, Bastien Giraud, Pascal Vivet, Alexandre Levisse, Norbert Wehn
RRAMSpec: A Design Space Exploration Framework for High Density Resistive RAM. SAMOS (2019)
Yvain Thonnart, Pascal Vivet, Shikhanshu Agarwal, Ramesh Chauhan
Latency Improvement of an Industrial SoC System Interconnect using an Asynchronous NoC Backbone. ASYNC (2019)
Tony F. Wu, Binh Q. Le, Robert Radway, Andrew Bartolo, William Hwang, Seungbin Jeong, Haitong Li, Pulkit Tandon, Elisa Vianello, Pascal Vivet, Etienne Nowak, Mary Wootters, H.-S. Philip Wong, Mohamed M. Sabry Aly, Edith Beigné, Subhasish Mitra
A 43pJ/Cycle Non-Volatile Microcontroller with 4.7μs Shutdown/Wake-up Integrating 2.3-bit/Cell Resistive RAM and Resilience Techniques. ISSCC (2019)
Pascal Vivet, Gilles Sicard, Laurent Millet, Stéphane Chevobbe, Karim Ben Chehida, Luis Angel Cubero, Monte Alegre, Maxence Bouvier, Alexandre Valentian, Maria Lepecq, Thomas Dombek, Olivier Bichler, Sébastien Thuries, Didier Lattard, Séverine Cheramy, Perrine Batude, Fabien Clermidy
Advanced 3D Technologies and Architectures for 3D Smart Image Sensors. DATE (2019)
Imed Jani, Didier Lattard, Pascal Vivet, Jean Durupt, Sébastien Thuries, Edith Beigné
Test Solutions for High Density 3D-IC Interconnects - Focus on SRAM-on-Logic Partitioning. ETS (2019)
Imed Jani, Didier Lattard, Pascal Vivet, Lucile Arnaud, Edith Beigné
Misalignment Analysis and Electrical Performance of High Density 3D-IC interconnects. 3DIC (2019)
Olivier Billoint, Karim Azizi-Mourier, Gerald Cibrario, Didier Lattard, Mehdi Mouhdach, Sébastien Thuries, Pascal Vivet
Merging PDKs to Build a Design Environment for 3D Circuits: Methodology, Challenges and Limitations. 3DIC (2019)
Aditya Narayan, Yvain Thonnart, Pascal Vivet, César Fuguet Tortolero, Ayse K. Coskun
WAVES: Wavelength Selection for Power-Efficient 2.5D-Integrated Photonic NoCs. DATE (2019)
Pascal Vivet, Sébastien Thuries, Olivier Billoint, Sylvain Choisnet, Didier Lattard, Edith Beigné, Perrine Batude
Monolithic 3D: an alternative to advanced CMOS scaling, technology perspectives and associated design methodology challenges. ICECS (2018)
Imed Jani, Didier Lattard, Pascal Vivet, Lucile Arnaud, Edith Beigné
BISTs for post-bond test and electrical analysis of high density 3D interconnect defects. ETS (2018)
Eric Guthmuller, César Fuguet Tortolero, Pascal Vivet, Christian Bernard, Ivan Miro Panades, Jean Durupt, E. Beignc, Didier Lattard, Séverine Cheramy, Alain Greiner, Quentin L. Meunier, Pirouz Bazargan-Sabet
A 29 Gops/Watt 3D-Ready 16-Core Computing Fabric with Scalable Cache Coherent Architecture Using Distributed L2 and Adaptive L3 Caches. ESSCIRC (2018)
Imed Jani, Didier Lattard, Pascal Vivet, Edith Beigné
Innovative structures to test bonding alignment and characterize high density interconnects in 3D-IC. NEWCAS (2017)
Pascal Vivet, Yvain Thonnart, Romain Lemaire, Cristiano Santos, Edith Beigné, Christian Bernard, Florian Darve, Didier Lattard, Ivan Miro Panades, Denis Dutoit, Fabien Clermidy, Séverine Cheramy, Abbas Sheibanyrad, Frédéric Pétrot, Eric Flamand, Jean Michailos, Alexandre Arriordaz, Lee Wang, Juergen Schloeffel
A 4 × 4 × 2 Homogeneous Scalable 3D Network-on-Chip Circuit With 326 MFlit/s 0.66 pJ/b Robust and Fault Tolerant Asynchronous 3D Links. IEEE J. Solid State Circuits 52 (1) (2017)
C. Santos, Pascal Vivet, Sébastien Thuries, Olivier Billoint, Jean-Philippe Colonna, Perceval Coudrain, L. Wang
Thermal performance of CoolCube™ monolithic and TSV-based 3D integration processes. 3DIC (2016)
S. Saqib Khursheed, Pascal Vivet, Fabian Hopsch, Erik Jan Marinissen
Guest Editors' Introduction: Robust 3-D Stacked ICs. IEEE Des. Test 33 (3) (2016)
Pascal Vivet, Yvain Thonnart, Romain Lemaire, Edith Beigné, Christian Bernard, Florian Darve, Didier Lattard, Ivan Miro Panades, Cristiano Santos, Fabien Clermidy, Séverine Cheramy, Frédéric Pétrot, Eric Flamand, Jean Michailos
8.1 A 4×4×2 homogeneous scalable 3D network-on-chip circuit with 326MFlit/s 0.66pJ/b robust and fault-tolerant asynchronous 3D links. ISSCC (2016)
Didier Lattard, Lucile Arnaud, Arnaud Garnier, Nicolas Bresson, Franck Bana, R. Segaud, Amadine Jouve, H. Jacquinot, Stéphane Moreau, Karim Azizi-Mourier, C. Chantre, Pascal Vivet, Gaël Pillonnet, F. Casset, F. Ponthenier, Alexis Farcy, S. Lhostis, Jean Michailos, Alexandre Arriordaz, Séverine Cheramy
ITAC: A complete 3D integration test platform. 3DIC (2016)
Francesco Beneventi, Andrea Bartolini, Pascal Vivet, Luca Benini
Thermal Analysis and Interpolation Techniques for a Logic + WideIO Stacked DRAM Test Chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35 (4) (2016)
Jean Durupt, Pascal Vivet, Juergen Schloeffel
IJTAG supported 3D DFT using chiplet-footprints for testing multi-chips active interposer system. ETS (2016)
Perceval Coudrain, Papa Momar Souare, Rafael Prieto, Vincent Fiori, Alexis Farcy, Laurent Le-Pailleur, Jean-Philippe Colonna, Cristiano Santos, Pascal Vivet, M. Haykel Ben Jamaa, Denis Dutoit, François de Crecy, Sylvain Dumas, Christian Chancel, Didier Lattard, Séverine Cheramy
Experimental Insights Into Thermal Dissipation in TSV-Based 3-D Integrated Circuits. IEEE Des. Test 33 (3) (2016)
Yassine Fkih, Pascal Vivet, Marie-Lise Flottes, Bruno Rouzeyre, Giorgio Di Natale, Juergen Schloeffel
3D DFT Challenges and Solutions. ISVLSI (2015)
Gaël Pillonnet, Nicolas Jeanniot, Pascal Vivet
3D ICs: An opportunity for fully-integrated, dense and efficient power supplies. 3DIC (2015)
Christian Weis, Matthias Jung, Peter Ehses, Cristiano Santos, Pascal Vivet, Sven Goossens, Martijn Koedam, Norbert Wehn
Retention time measurements and modelling of bit error rates of WIDE I/O DRAM in MPSoCs. DATE (2015)
Pascal Vivet, Christian Bernard, Fabien Clermidy, Denis Dutoit, Eric Guthmuller, Ivan Miro Panades, Gaël Pillonnet, Yvain Thonnart, Arnaud Garnier, Didier Lattard, Amandine Jouve, Franck Bana, Thierry Mourier, Séverine Cheramy
3D advanced integration technology for heterogeneous systems. 3DIC (2015)
Edith Beigné, Fabien Clermidy, Didier Lattard, Ivan Miro Panades, Yvain Thonnart, Pascal Vivet
Fine-grain DVFS and AVFS techniques for complex SoC design: An overview of architectural solutions through technology nodes. ISCAS (2015)
Cristiano Santos, Rafael Prieto, Pascal Vivet, Jean-Philippe Colonna, Perceval Coudrain, Ricardo Reis
Graphite-based heat spreaders for hotspot mitigation in 3D ICs. 3DIC (2015)
Christian Weis, Matthias Jung, Omar Naji, Norbert Wehn, Cristiano Santos, Pascal Vivet, Andreas Hansson
Thermal Aspects and High-Level Explorations of 3D Stacked DRAMs. ISVLSI (2015)
Florent Berthier, Edith Beigné, Pascal Vivet, Olivier Sentieys
Power gain estimation of an event-driven wake-up controller dedicated to WSN's microcontroller. NEWCAS (2015)
Julian J. H. Pontes, Pascal Vivet, Yvain Thonnart
Two-phase protocol converters for 3D asynchronous 1-of-n data links. ASP-DAC (2015)
Pascal Vivet, Christian Bernard, Eric Guthmuller, Ivan Miro Panades, Yvain Thonnart, Fabien Clermidy
Interconnect Challenges for 3D Multi-cores: From 3D Network-on-Chip to Cache Interconnects. ISVLSI (2015)
Tanguy Sassolas, Chiara Sandionigi, Alexandre Guerre, Julien Mottin, Pascal Vivet, Hela Boussetta, Nicolas Peltier
A simulation framework for rapid prototyping and evaluation of thermal mitigation techniques in many-core architectures. ISLPED (2015)
Francesco Beneventi, Andrea Bartolini, Pascal Vivet, Denis Dutoit, Luca Benini
Thermal analysis and model identification techniques for a logic + WIDEIO stacked DRAM test chip. DATE (2014)
Tanguy Sassolas, Chiara Sandionigi, Alexandre Guerre, Alexandre Aminot, Pascal Vivet, Hela Boussetta, Luca Ferro, Nicolas Peltier
Early design stage thermal evaluation and mitigation: The locomotiv architectural case. DATE (2014)
Cristiano Santos, Pascal Vivet, Gene Matter, Nicolas Peltier, Sylvian Kaiser, Ricardo Augusto da Luz Reis
Thermal modeling methodology for efficient system-level thermal analysis. CICC (2014)
Bilel Belhadj, Alexandre Valentian, Pascal Vivet, Marc Duranton, Liqiang He, Olivier Temam
The improbable but highly appropriate marriage of 3D stacking and neuromorphic accelerators. CASES (2014)
Cristiano Santos, Papa Momar Souare, François de Crecy, Perceval Coudrain, Jean-Philippe Colonna, Pascal Vivet, Andras Borbely, Ricardo Reis, M. Haykel Ben Jamaa, Vincent Fiori, Alexis Farcy
Using TSVs for thermal mitigation in 3D circuits: Wish and truth. 3DIC (2014)
Yassine Fkih, Pascal Vivet, Bruno Rouzeyre, Marie-Lise Flottes, Giorgio Di Natale, Juergen Schloeffel
2D to 3D Test Pattern Retargeting Using IEEE P1687 Based 3D DFT Architectures. ISVLSI (2014)
Ivan Miro Panades, Edith Beigné, Yvain Thonnart, Laurent Alacoque, Pascal Vivet, Suzanne Lesecq, Diego Puschini, Anca Molnos, Farhat Thabet, Benoît Tain, Karim Ben Chehida, Sylvain Engels, Robin Wilson, Didier Fuin
A Fine-Grain Variation-Aware Dynamic Vdd-Hopping AVFS Architecture on a 32 nm GALS MPSoC. IEEE J. Solid State Circuits 49 (7) (2014)
Cristiano Santos, Pascal Vivet, Jean-Philippe Colonna, Perceval Coudrain, Ricardo Augusto da Luz Reis
Thermal performance of 3D ICs: Analysis and alternatives. 3DIC (2014)
Cristiano Santos, Pascal Vivet, Ricardo Augusto da Luz Reis
Thermal impact of 3D stacking and die thickness: Analysis and characterization of a memory-on-logic 3D circuit. ICECS (2014)
Thomas Ducroux, Germain Haugou, Vincent Risson, Pascal Vivet
Fast and accurate power annotated simulation: Application to a many-core architecture. PATMOS (2013)
Fabien Clermidy, Denis Dutoit, Eric Guthmuller, Ivan Miro Panades, Pascal Vivet
3D stacking for multi-core architectures: From WIDEIO to distributed caches. ISCAS (2013)
Julian J. H. Pontes, Ney Calazans, Pascal Vivet
Parity check for m-of-n delay insensitive codes. IOLTS (2013)
Claude Helmstetter, Sylvain Basset, Romain Lemaire, Fabien Clermidy, Pascal Vivet, Michel Langevin, Chuck Pilkington, Pierre G. Paulin, Didier Fuin
A dynamic stream link for efficient data flow control in NoC based heterogeneous MPSoC. ASP-DAC (2013)
Alex Yakovlev, Pascal Vivet, Marc Renaudin
Advances in asynchronous logic: from principles to GALS & NoC, recent industry applications, and commercial CAD tools. DATE (2013)
Yuanqing Cheng, Aida Todri-Sanial, Alberto Bosio, Luigi Dillio, Patrick Girard, Arnaud Virazel, Pascal Vivet, Marc Belleville
A novel method to mitigate TSV electromigration for 3D ICs. ISVLSI (2013)
Claude Helmstetter, Jérôme Cornet, Bruno Galilée, Matthieu Moy, Pascal Vivet
Fast and accurate TLM simulations using temporal decoupling for FIFO-based communications. DATE (2013)
Cristiano Santos, Pascal Vivet, Denis Dutoit, Philippe Garrault, Nicolas Peltier, Ricardo Reis
System-level thermal modeling for 3D circuits: Characterization with a 65nm memory-on-logic circuit. 3DIC (2013)
Carolina Metzler, Aida Todri-Sanial, Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel, Pascal Vivet, Marc Belleville
Computing detection probability of delay defects in signal line tsvs. ETS (2013)
Yassine Fkih, Pascal Vivet, Bruno Rouzeyre, Marie-Lise Flottes, Giorgio Di Natale
A 3D IC BIST for pre-bond test of TSVs using ring oscillators. NEWCAS (2013)
Edith Beigné, Ivan Miro-Panades, Yvain Thonnart, Laurent Alacoque, Pascal Vivet, Suzanne Lesecq, Diego Puschini, Farhat Thabet, Benoît Tain, K. Benchehida, Sylvain Engels, Robin Wilson, Didier Fuin
A fine grain variation-aware dynamic Vdd-hopping AVFS architecture on a 32nm GALS MPSoC. ESSCIRC (2013)
Julian J. H. Pontes, Ney Calazans, Pascal Vivet
H2A: A hardened asynchronous network on chip. SBCCI (2013)
Julian J. H. Pontes, Ney Calazans, Pascal Vivet
Adding Temporal Redundancy to Delay Insensitive Codes to Mitigate Single Event Effects. ASYNC (2012)
Yvain Thonnart, Edith Beigné, Pascal Vivet
A Pseudo-Synchronous Implementation Flow for WCHB QDI Asynchronous Circuits. ASYNC (2012)
Julian J. H. Pontes, Ney Calazans, Pascal Vivet
An accurate Single Event Effect digital design flow for reliable system level design. DATE (2012)
Fabien Clermidy, Florian Darve, Denis Dutoit, Walid Lafi, Pascal Vivet
3D Embedded multi-core: Some perspectives. DATE (2011)
Jean-Frédéric Christmann, Edith Beigné, Cyril Condemine, Pascal Vivet, Jérôme Willemin, Nicolas Leblond, Christian Piguet
Bringing Robustness and Power Efficiency to Autonomous Energy-Harvesting Microsystems. IEEE Des. Test Comput. 28 (5) (2011)
Florian Darve, Abbas Sheibanyrad, Pascal Vivet, Frédéric Pétrot
Physical Implementation of an Asynchronous 3D-NoC Router Using Serial Vertical Links. ISVLSI (2011)
Benny Akesson, Po-Chun Huang, Fabien Clermidy, Denis Dutoit, Kees Goossens, Yuan-Hao Chang, Tei-Wei Kuo, Pascal Vivet, Drew Wingard
Memory controllers for high-performance and real-time MPSoCs: requirements, architectures, and future trends. CODES+ISSS (2011)
Pascal Vivet, Denis Dutoit, Yvain Thonnart, Fabien Clermidy
3D NoC using through silicon Via: An asynchronous implementation. VLSI-SoC (2011)
Carolina Albea, Diego Puschini, Pascal Vivet, Ivan Miro Panades, Edith Beigné, Suzanne Lesecq
Architecture and Robust Control of a Digital Frequency-Locked Loop for Fine-Grain Dynamic Voltage and Frequency Scaling in Globally Asynchronous Locally Synchronous Structures. J. Low Power Electron. 7 (3) (2011)
Pascal Vivet, Edith Beigné, Hugo Lebreton, Nacer-Eddine Zergainoh
On-line Power Optimization of Data Flow Multi-Core Architecture Based on Vdd-Hopping for Local Dynamic Voltage and Frequency Scaling. J. Low Power Electron. 7 (2) (2011)
Pascal Vivet, Edith Beigné, Hugo Lebreton, Nacer-Eddine Zergainoh
On Line Power Optimization of Data Flow Multi-core Architecture Based on Vdd-Hopping for Local DVFS. PATMOS (2010)
Jean-Frédéric Christmann, Edith Beigné, Cyril Condemine, Nicolas Leblond, Pascal Vivet, G. Waltisperger, Jérôme Willemin
Bringing Robustness and Power Efficiency to Autonomous Energy Harvesting Microsystems. ASYNC (2010)
Yvain Thonnart, Pascal Vivet, Fabien Clermidy
A fully-asynchronous low-power framework for GALS NoC integration. DATE (2010)
Fabien Clermidy, Christian Bernard, Romain Lemaire, Jérôme Martin, Ivan Miro Panades, Yvain Thonnart, Pascal Vivet, Norbert Wehn
A 477mW NoC-based digital baseband for MIMO 4G SDR. ISSCC (2010)
Fabien Clermidy, Romain Lemaire, Yvain Thonnart, Pascal Vivet
A Communication and configuration controller for NoC based reconfigurable data flow architecture. NOCS (2009)
Yvain Thonnart, Edith Beigné, Pascal Vivet
Design and Implementation of a GALS Adapter for ANoC Based Architectures. ASYNC (2009)
Yvain Thonnart, Edith Beigné, Alexandre Valentian, Pascal Vivet
Power Reduction of Asynchronous Logic Circuits Using Activity Detection. IEEE Trans. Very Large Scale Integr. Syst. 17 (7) (2009)
Edith Beigné, Fabien Clermidy, Hélène Lhermet, Sylvain Miermont, Yvain Thonnart, Xuan-Tu Tran, Alexandre Valentian, Didier Varreau, Pascal Vivet, Xavier Popon, Hugo Lebreton
An Asynchronous Power Aware and Adaptive NoC Based Circuit. IEEE J. Solid State Circuits 44 (4) (2009)
Edith Beigné, Fabien Clermidy, Sylvain Miermont, Pascal Vivet
Dynamic Voltage and Frequency Scaling Architecture for Units Integration within a GALS NoC. NOCS (2008)
Edith Beigné, Fabien Clermidy, Sylvain Miermont, Alexandre Valentian, Pascal Vivet, S. Barasinski, F. Blisson, N. Kohli, S. Kumar
A fully integrated power supply unit for fine grain power management application to embedded Low Voltage SRAMs. ESSCIRC (2008)
Hugo Lebreton, Pascal Vivet
Power Modeling in SystemC at Transaction Level, Application to a DVFS Architecture. ISVLSI (2008)
Ivan Miro Panades, Fabien Clermidy, Pascal Vivet, Alain Greiner
Physical Implementation of the DSPIN Network-on-Chip in the FAUST Architecture. NOCS (2008)
Yvain Thonnart, Edith Beigné, Alexandre Valentian, Pascal Vivet
Automatic Power Regulation Based on an Asynchronous Activity Detection and its Application to ANOC Node Leakage Reduction. ASYNC (2008)
Didier Lattard, Edith Beigné, Fabien Clermidy, Yves Durand, Romain Lemaire, Pascal Vivet, Friedbert Berens
A Reconfigurable Baseband Platform Based on an Asynchronous Network-on-Chip. IEEE J. Solid State Circuits 43 (1) (2008)
Gwen Salaün, Wendelin Serwe, Yvain Thonnart, Pascal Vivet
Formal Verification of CHP Specifications with CADP Illustration on an Asynchronous Network-on-Chip. ASYNC (2007)
Sylvain Miermont, Pascal Vivet, Marc Renaudin
A Power Supply Selector for Energy- and Area-Efficient Local Dynamic Voltage Scaling. PATMOS (2007)
Milos Krstic, Eckhard Grass, Frank K. Gürkaynak, Pascal Vivet
Globally Asynchronous, Locally Synchronous Circuits: Overview and Outlook. IEEE Des. Test Comput. 24 (5) (2007)
Cedric Koch-Hofer, Marc Renaudin, Yvain Thonnart, Pascal Vivet
ASC, a SystemC Extension for Modeling Asynchronous Systems, and Its Application to an Asynchronous NoC. NOCS (2007)
Anh-Vu Dinh-Duc, Pascal Vivet, Alain Clouard
A Transaction Level Modeling of Network-on-Chip Architecture for Energy Estimation. RIVF (2007)
Didier Lattard, Edith Beigné, Christian Bernard, Catherine Bour, Fabien Clermidy, Yves Durand, Jean Durupt, Didier Varreau, Pascal Vivet, Pierre Penard, Arnaud Bouttier, Friedbert Berens
A Telecom Baseband Circuit based on an Asynchronous Network-on-Chip. ISSCC (2007)
Edith Beigné, Pascal Vivet
Design of On-chip and Off-chip Interfaces for a GALS NoC Architecture. ASYNC (2006)
Edith Beigné, Fabien Clermidy, Pascal Vivet, Alain Clouard, Marc Renaudin
An Asynchronous NOC Architecture Providing Low Latency Service and Its Multi-Level Design Framework. ASYNC (2005)
André Abrial, Jacky Bouvier, Marc Renaudin, Patrice Senn, Pascal Vivet
A new contactless smart card IC using an on-chip antenna and an asynchronous microcontroller. IEEE J. Solid State Circuits 36 (7) (2001)
Marc Renaudin, Pascal Vivet, Frédéric Robin
A Design Framework for Asynchronous/Synchronous Circuits Based on CHP to VHDL Translation. ASYNC (1999)

Pascal Vivet.css-eqlu8i{font-size:small;padding-left:4px;}

Publication Activity (10 Years)

Top Topics

Top Venues

Pascal Vivet