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Physical Implementation of the DSPIN Network-on-Chip in the FAUST Architecture.
Ivan Miro Panades
Fabien Clermidy
Pascal Vivet
Alain Greiner
Published in:
NOCS (2008)
Keyphrases
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network on chip
multi processor
routing algorithm
parallel architecture
real time
hardware implementation
cmos technology
network simulator
data transfer
software implementation
packet switched
parallel processing
efficient implementation
hardware design