Formal Verification of CHP Specifications with CADP Illustration on an Asynchronous Network-on-Chip.
Gwen SalaünWendelin SerweYvain ThonnartPascal VivetPublished in: ASYNC (2007)
Keyphrases
- formal verification
- network on chip
- bounded model checking
- model checker
- automated verification
- model checking
- routing algorithm
- network simulator
- delay insensitive
- multi processor
- data transfer
- formal specification
- ad hoc networks
- routing protocol
- interconnection networks
- temporal logic
- formal methods
- scheduling problem