Alexandre Valentian

Publication Activity (10 Years)

Years Active: 2004-2023
Publications (10 Years): 20

Top Topics

Ultra Low Power

Keyword Spotting

Top Venues

Publications

Ivan Miro-Panades, Benoît Tain, Jean-Frédéric Christmann, David Coriat, Romain Lemaire, Clement Jany, Baudouin Martineau, Fabrice Chaix, Guillaume Waltener, Emmanuel Pluchart, Jean-Philippe Noel, Adam Makosiej, Maxime Montoya, Simone Bacles-Min, David Briand, Jean-Marc Philippe, Yvain Thonnart, Alexandre Valentian, Frédéric Heitzmann, Fabien Clermidy
SamurAI: A Versatile IoT Node With Event-Driven Wake-Up and Embedded ML Acceleration. IEEE J. Solid State Circuits 58 (6) (2023)
Manon Dampfhoffer, Thomas Mesquida, Emmanuel Hardy, Alexandre Valentian, Lorena Anghel
Leveraging Sparsity with Spiking Recurrent Neural Networks for Energy-Efficient Keyword Spotting. ICASSP (2023)
Manon Dampfhoffer, Joel Minguet Lopez, Thomas Mesquida, Alexandre Valentian, Lorena Anghel
Improving the Robustness of Neural Networks to Noisy Multi-Level Non-Volatile Memory-based Synapses. IJCNN (2023)
Ivan Miro-Panades, Benoît Tain, Jean-Frédéric Christmann, David Coriat, Romain Lemaire, Clement Jany, Baudouin Martineau, Fabrice Chaix, Guillaume Waltener, Emmanuel Pluchart, Jean-Philippe Noel, Adam Makosiej, Maxime Montoya, Simone Bacles-Min, David Briand, Jean-Marc Philippe, Yvain Thonnart, Alexandre Valentian, Frédéric Heitzmann, Fabien Clermidy
SamurAI: A Versatile IoT Node With Event-Driven Wake-Up and Embedded ML Acceleration. CoRR (2023)
Manon Dampfhoffer, Thomas Mesquida, Alexandre Valentian, Lorena Anghel
Are SNNs Really More Energy-Efficient Than ANNs? an In-Depth Hardware-Aware Study. IEEE Trans. Emerg. Top. Comput. Intell. 7 (3) (2023)
Manon Dampfhoffer, Thomas Mesquida, Alexandre Valentian, Lorena Anghel
Investigating Current-Based and Gating Approaches for Accurate and Energy-Efficient Spiking Recurrent Neural Networks. ICANN (3) (2022)
Dennis V. Christensen, Regina Dittmann, Bernabé Linares-Barranco, Abu Sebastian, Manuel Le Gallo, Andrea Redaelli, Stefan Slesazeck, Thomas Mikolajick, Sabina Spiga, Stephan Menzel, Ilia Valov, Gianluca Milano, Carlo Ricciardi, Shi-Jun Liang, Feng Miao, Mario Lanza, Tyler J. Quill, Scott T. Keene, Alberto Salleo, Julie Grollier, Danijela Markovic, Alice Mizrahi, Peng Yao, J. Joshua Yang, Giacomo Indiveri, John Paul Strachan, Suman Datta, Elisa Vianello, Alexandre Valentian, Johannes Feldmann, Xuan Li, Wolfram H. P. Pernice, Harish Bhaskaran, Steve B. Furber, Emre Neftci, Franz Scherr, Wolfgang Maass, Srikanth Ramaswamy, Jonathan Tapson, Priyadarshini Panda, Youngeun Kim, Gouhei Tanaka, Simon Thorpe, Chiara Bartolozzi, Thomas A. Cleland, Christoph Posch, Shih-Chii Liu, Gabriella Panuccio, Mufti Mahmud, Arnab Neelim Mazumder, Morteza Hosseini, Tinoosh Mohsenin, Elisa Donati, Silvia Tolu, Roberto Galeazzi, Martin Ejsing Christensen, Sune Holm, Daniele Ielmini, N. Pryds
2022 roadmap on neuromorphic computing and engineering. Neuromorph. Comput. Eng. 2 (2) (2022)
Dennis V. Christensen, Regina Dittmann, Bernabé Linares-Barranco, Abu Sebastian, Manuel Le Gallo, Andrea Redaelli, Stefan Slesazeck, Thomas Mikolajick, Sabina Spiga, Stephan Menzel, Ilia Valov, Gianluca Milano, Carlo Ricciardi, Shi-Jun Liang, Feng Miao, Mario Lanza, Tyler J. Quill, Scott T. Keene, Alberto Salleo, Julie Grollier, Danijela Markovic, Alice Mizrahi, Peng Yao, J. Joshua Yang, Giacomo Indiveri, John Paul Strachan, Suman Datta, Elisa Vianello, Alexandre Valentian, Johannes Feldmann, Xuan Li, Wolfram H. P. Pernice, Harish Bhaskaran, Emre Neftci, Srikanth Ramaswamy, Jonathan Tapson, Franz Scherr, Wolfgang Maass, Priyadarshini Panda, Youngeun Kim, Gouhei Tanaka, Simon Thorpe, Chiara Bartolozzi, Thomas A. Cleland, Christoph Posch, Shih-Chii Liu, Arnab Neelim Mazumder, Morteza Hosseini, Tinoosh Mohsenin, Elisa Donati, Silvia Tolu, Roberto Galeazzi, Martin Ejsing Christensen, Sune Holm, Daniele Ielmini, N. Pryds
2021 Roadmap on Neuromorphic Computing and Engineering. CoRR (2021)
Jean-René Léquepeys, Marc Duranton, S. Bonnetier, S. Catrou, R. Fournel, T. Ernst, L. Hérault, D. Louis, A. Jerraya, Alexandre Valentian, F. Perruchot, Thomas Signamarcheix, Elisa Vianello, Carlo Reita
Overcoming the Data Deluge Challenges with Greener Electronics. ESSDERC (2021)
Maxence Bouvier, Alexandre Valentian, Gilles Sicard
Scalable Pitch-Constrained Neural Processing Unit for 3D Integration with Event-Based Imagers. DAC (2021)
J.-R. Léquepeys, Marc Duranton, S. Bonnetier, S. Catrou, R. Fournel, T. Ernst, L. Hérault, D. Louis, A. Jerraya, Alexandre Valentian, F. Perruchot, Thomas Signamarcheix, Elisa Vianello, Carlo Reita
Overcoming the Data Deluge Challenges with Greener Electronics. ESSCIRC (2021)
Maxence Bouvier, Alexandre Valentian, Thomas Mesquida, François Rummens, Marina Reyboz, Elisa Vianello, Edith Beigné
Spiking Neural Networks Hardware Implementations and Challenges: a Survey. CoRR (2020)
Ivan Miro Panades, Benoît Tain, Jean-Frédéric Christmann, David Coriat, Romain Lemaire, Clement Jany, Baudouin Martineau, Fabrice Chaix, Anthony Quelen, Emmanuel Pluchart, Jean-Philippe Noel, Reda Boumchedda, Adam Makosiej, Maxime Montoya, Simone Bacles-Min, David Briand, Jean-Marc Philippe, Alexandre Valentian, Frédéric Heitzmann, Edith Beigné, Fabien Clermidy
SamurAI: A 1.7MOPS-36GOPS Adaptive Versatile IoT Node with 15, 000× Peak-to-Idle Power Reduction, 207ns Wake-Up Time and 1.3TOPS/W ML Efficiency. VLSI Circuits (2020)
Amir Regev, Alessandro Bricalli, Giuseppe Piccolboni, Alexandre Valentian, Thomas Mesquida, Gabriel Molas, Jean-François Nodin
Fully-Integrated Spiking Neural Network Using SiOx-Based RRAM as Synaptic Device. AICAS (2020)
Maxence Bouvier, Alexandre Valentian, Thomas Mesquida, François Rummens, Marina Reyboz, Elisa Vianello, Edith Beigné
Spiking Neural Networks Hardware Implementations and Challenges: A Survey. ACM J. Emerg. Technol. Comput. Syst. 15 (2) (2019)
Pascal Vivet, Gilles Sicard, Laurent Millet, Stéphane Chevobbe, Karim Ben Chehida, Luis Angel Cubero, Monte Alegre, Maxence Bouvier, Alexandre Valentian, Maria Lepecq, Thomas Dombek, Olivier Bichler, Sébastien Thuries, Didier Lattard, Séverine Cheramy, Perrine Batude, Fabien Clermidy
Advanced 3D Technologies and Architectures for 3D Smart Image Sensors. DATE (2019)
Elisa Vianello, Denys R. B. Ly, Selina La Barbera, Thomas Dalgaty, Niccolo Castellani, Gabriele Navarro, Guillaume Bourgeois, Alexandre Valentian, Etienne Nowak, Damien Querlioz
Metal Oxide Resistive Memory (OxRAM) and Phase Change Memory (PCM) as Artificial Synapses in Spiking Neural Networks. ICECS (2018)
Thomas Mesquida, Alexandre Valentian, David Bol, Edith Beigné
Architecture exploration of a fixed point computation unit using precise timing spiking neurons. PATMOS (2017)
Sebastien Bernard, Marc Belleville, Jean-Didier Legat, Alexandre Valentian, David Bol
Ultra-wide voltage range pulse-triggered flip-flops and register file with tunable energy-delay target in 28 nm UTBB-FDSOI. Microelectron. J. 57 (2016)
Gerald Cibrario, Nour Ben Salem, Joris Lacord, Karim Azizi-Mourier, Olivier Rozeau, Etienne Maurin, Olivier Billoint, Sébastien Thuries, Alexandre Valentian
From 2D to monolithic 3D predictive design platform: An innovative migration methodology for benchmark purpose. 3DIC (2016)
Samer Houri, Gérard Billiot, Marc Belleville, Alexandre Valentian, Hervé Fanet
Power-Clock Generator Impact on the Performance of NEM-Based Quasi-Adiabatic Logic Circuits. RC (2015)
Edith Beigné, Jean-Frédéric Christmann, Alexandre Valentian, Olivier Billoint, Esteve Amat, Dominique Morche
UTBB FDSOI technology flexibility for ultra low power internet-of-things applications. ESSDERC (2015)
Samer Houri, Gérard Billiot, Marc Belleville, Alexandre Valentian, Hervé Fanet
Limits of CMOS Technology and Interest of NEMS Relays for Adiabatic Logic Applications. IEEE Trans. Circuits Syst. I Regul. Pap. (6) (2015)
Edith Beigné, Alexandre Valentian, Ivan Miro Panades, Robin Wilson, Philippe Flatresse, Fady Abouzeid, Thomas Benoist, Christian Bernard, Sebastien Bernard, Olivier Billoint, Sylvain Clerc, Bastien Giraud, Anuj Grover, Julien Le Coz, Jean-Philippe Noel, Olivier Thomas, Yvain Thonnart
A 460 MHz at 397 mV, 2.6 GHz at 1.3 V, 32 bits VLIW DSP Embedding F MAX Tracking. IEEE J. Solid State Circuits 50 (1) (2015)
Fabien Clermidy, Rodolphe Héliot, Alexandre Valentian, Christian Gamrat, Olivier Bichler, Marc Duranton, Bilel Belhadj, Olivier Temam
Advanced technologies for brain-inspired computing. ASP-DAC (2014)
Sebastien Bernard, Alexandre Valentian, David Bol, Jean-Didier Legat, Marc Belleville
A Robust and Energy Efficient Pulse-Triggered Flip-Flop Design for Ultra Low Voltage Operations. J. Low Power Electron. 10 (1) (2014)
Robin Wilson, Edith Beigné, Philippe Flatresse, Alexandre Valentian, Fady Abouzeid, Thomas Benoist, Christian Bernard, Sebastien Bernard, Olivier Billoint, Sylvain Clerc, Bastien Giraud, Anuj Grover, Julien Le Coz, Ivan Miro Panades, Jean-Philippe Noël, Bertrand Pelloux-Prayer, Philippe Roche, Olivier Thomas, Yvain Thonnart, David Turgis, Fabien Clermidy, Philippe Magarshack
27.1 A 460MHz at 397mV, 2.6GHz at 1.3V, 32b VLIW DSP, embedding FMAX tracking. ISSCC (2014)
Bilel Belhadj, Alexandre Valentian, Pascal Vivet, Marc Duranton, Liqiang He, Olivier Temam
The improbable but highly appropriate marriage of 3D stacking and neuromorphic accelerators. CASES (2014)
Sébastien Sarrazin, Samuel Evain, Ivan Miro Panades, Alexandre Valentian, Suresh Pajaniradja, Lirida Alves de Barros Naviner, Valentin Gherman
Shadow-scan design with low latency overhead and in-situ slack-time monitoring. ETS (2014)
Sebastien Bernard, Marc Belleville, Alexandre Valentian, Jean-Didier Legat, David Bol
Experimental analysis of flip-flops minimum operating voltage in 28nm FDSOI and the impact of back bias and temperature. PATMOS (2014)
Samer Houri, Alexandre Valentian, Hervé Fanet
Comparing CMOS-Based and NEMS-Based Adiabatic Logic Circuits. RC (2013)
Edith Beigné, Alexandre Valentian, Bastien Giraud, Olivier Thomas, Thomas Benoist, Yvain Thonnart, Serge Bernard, Guillaume Moritz, Olivier Billoint, Y. Maneglia, Philippe Flatresse, Jean-Philippe Noel, Fady Abouzeid, Bertrand Pelloux-Prayer, Anuj Grover, Sylvain Clerc, Philippe Roche, Julien Le Coz, Sylvain Engels, Robin Wilson
Ultra-wide voltage range designs in fully-depleted silicon-on-insulator FETs. DATE (2013)
Bertrand Pelloux-Prayer, Alexandre Valentian, Bastien Giraud, Yvain Thonnart, Jean-Philippe Noel, Philippe Flatresse, Edith Beigné
Fine grain multi-VT co-integration methodology in UTBB FD-SOI technology. VLSI-SoC (2013)
Sebastien Bernard, Alexandre Valentian, Marc Belleville, David Bol, Jean-Didier Legat
An efficient metric of setup time for pulsed flip-flops based on output transition time. ICICDT (2013)
Marc Belleville, Olivier Thomas, Alexandre Valentian, Fabien Clermidy
Design challenges for nano-scale devices. ESSDERC (2012)
Dimitri Soussan, Alexandre Valentian, Sylvain Majcherczak, Marc Belleville
A mixed LPDDR2 impedance calibration technique exploiting 28nm Fully-Depleted SOI Back-Biasing. ICICDT (2012)
Julien Le Coz, Philippe Flatresse, Sylvain Engels, Alexandre Valentian, Marc Belleville, Christine Raynaud, Damien Croain, Pascal Urard
Comparison of 65nm LP bulk and LP PD-SOI with adaptive power gate body bias for an LDPC codec. ISSCC (2011)
Lionel Cadix, Alexis Farcy, Cédric Bermond, Christine Fuchs, Patrick Leduc, Maxime Rousseau, Myriam Assous, Alexandre Valentian, Julie Roullard, Elie Eid, Nicolas Sillon, Bernard Fléchet, Pascal Ancey
Modelling of Through Silicon Via RF performance and impact on signal transmission in 3D integrated circuits. 3DIC (2009)
Yvain Thonnart, Edith Beigné, Alexandre Valentian, Pascal Vivet
Power Reduction of Asynchronous Logic Circuits Using Activity Detection. IEEE Trans. Very Large Scale Integr. Syst. 17 (7) (2009)
Edith Beigné, Fabien Clermidy, Hélène Lhermet, Sylvain Miermont, Yvain Thonnart, Xuan-Tu Tran, Alexandre Valentian, Didier Varreau, Pascal Vivet, Xavier Popon, Hugo Lebreton
An Asynchronous Power Aware and Adaptive NoC Based Circuit. IEEE J. Solid State Circuits 44 (4) (2009)
Edith Beigné, Fabien Clermidy, Sylvain Miermont, Alexandre Valentian, Pascal Vivet, S. Barasinski, F. Blisson, N. Kohli, S. Kumar
A fully integrated power supply unit for fine grain power management application to embedded Low Voltage SRAMs. ESSCIRC (2008)
Alexandre Valentian, Edith Beigné
Automatic Gate Biasing of an SCCMOS Power Switch Achieving Maximum Leakage Reduction and Lowering Leakage Current Variability. IEEE J. Solid State Circuits 43 (7) (2008)
Yvain Thonnart, Edith Beigné, Alexandre Valentian, Pascal Vivet
Automatic Power Regulation Based on an Asynchronous Activity Detection and its Application to ANOC Node Leakage Reduction. ASYNC (2008)
Alexandre Valentian, Edith Beigné
Gate bias circuit for an SCCMOS power switch achieving maximum leakage reduction. ESSCIRC (2007)
Alexandre Valentian, Olivier Thomas, Andrei Vladimirescu, Amara Amara
Modeling subthreshold SOI logic for static timing analysis. IEEE Trans. Very Large Scale Integr. Syst. 12 (6) (2004)