Lirida Alves de Barros Naviner

Publication Activity (10 Years)

Years Active: 2003-2023
Publications (10 Years): 8

Top Topics

Computing Paradigms

Evaluation Methodologies

Top Venues

Microelectron. Reliab.

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Hao Cai, Yaoru Hou, Mengdi Zhang, Bo Liu, Lirida Alves de Barros Naviner
Dependable STT-MRAM With Emerging Approximation and Speculation Paradigms. IEEE Des. Test 40 (3) (2023)
Bo Liu, Mingyue Liu, Yongliang Zhou, Xiaofeng Hong, Hao Cai, Lirida Alves de Barros Naviner
Writing-only in-MRAM computing paradigm for ultra-low power applications. Microprocess. Microsystems 90 (2022)
Hao Cai, You Wang, Lirida Alves de Barros Naviner, Xinning Liu, Weiwei Shan, Jun Yang, Weisheng Zhao
Addressing Failure and Aging Degradation in MRAM/MeRAM-on-FDSOI Integration. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2019)
Hao Cai, You Wang, Lirida Alves de Barros Naviner, Weisheng Zhao
Robust Ultra-Low Power Non-Volatile Logic-in-Memory Circuits in FD-SOI Technology. IEEE Trans. Circuits Syst. I Regul. Pap. (4) (2017)
Nilson Maciel de Paiva, Elaine Crespo Marques, Lirida Alves de Barros Naviner
Sparsity analysis using a mixed approach with greedy and LS algorithms on channel estimation. ICFSP (2017)
Hao Cai, Kaikai Liu, Lirida Alves de Barros Naviner, You Wang, Mariem Slimani, Jean-François Naviner
Efficient reliability evaluation methodologies for combinational circuits. Microelectron. Reliab. 64 (2016)
Hao Cai, You Wang, Kaikai Liu, Lirida Alves de Barros Naviner, Hervé Petit, Jean-François Naviner
Cross-layer investigation of continuous-time sigma-delta modulator under aging effects. Microelectron. Reliab. 55 (3-4) (2015)
Lirida Alves de Barros Naviner, Hao Cai, You Wang, Weisheng Zhao, Arwa Ben Dhia
Stochastic computation with Spin Torque Transfer Magnetic Tunnel Junction. NEWCAS (2015)
Sébastien Sarrazin, Samuel Evain, Ivan Miro Panades, Alexandre Valentian, Suresh Pajaniradja, Lirida Alves de Barros Naviner, Valentin Gherman
Shadow-scan design with low latency overhead and in-situ slack-time monitoring. ETS (2014)
Lirida Alves de Barros Naviner
Analytical methods to assess transient faults effects in logic circuits. MWSCAS (2014)
Sébastien Sarrazin, Samuel Evain, Ivan Miro Panades, Lirida Alves de Barros Naviner, Valentin Gherman
Flip-flop selection for in-situ slack-time monitoring based on the activation probability of timing-critical paths. IOLTS (2014)
Ting An, Kaikai Liu, Lirida Alves de Barros Naviner
Analytical method for reliability assessment of concurrent checking circuits under multiple faults. MIPRO (2014)
Ting An, Kaikai Liu, Hao Cai, Lirida Alves de Barros Naviner
Efficient implementation for accurate analysis of CED circuits against multiple faults. MIXDES (2014)
Hao Cai, Kaikai Liu, Lirida Alves de Barros Naviner
Reliability-aware delay faults evaluation of CMOS flip-flops. MIXDES (2014)
Ting An, Hao Cai, Lirida Alves de Barros Naviner
Simulation study of aging in CMOS binary adders. MIPRO (2014)
Sébastien Sarrazin, Samuel Evain, Lirida Alves de Barros Naviner, Yannick Bonhomme, Valentin Gherman
Scan design with shadow flip-flops for low performance overhead and concurrent delay fault detection. DATE (2013)
Samuel N. Pagliarini, Arwa Ben Dhia, Lirida Alves de Barros Naviner, Jean-François Naviner
SNaP: A novel hybrid method for circuit reliability assessment under multiple faults. Microelectron. Reliab. 53 (9-11) (2013)
Arwa Ben Dhia, Samuel N. Pagliarini, Lirida Alves de Barros Naviner, Habib Mehrez, Philippe Matherat
A defect-tolerant area-efficient multiplexer for basic blocks in SRAM-based FPGAs. Microelectron. Reliab. 53 (9-11) (2013)
Ting An, Lirida Alves de Barros Naviner, Philippe Matherat
Evaluation of fault-tolerant composite field AES S-boxes under multiple transient faults. NEWCAS (2013)
Ting An, Lirida Alves de Barros Naviner, Philippe Matherat
A low cost reliable architecture for S-Boxes in AES processors. DFTS (2013)
Matteo Causo, Ting An, Lirida Alves de Barros Naviner
Parallel scaling-free and area-time efficient CORDIC algorithm. ICECS (2012)
Arwa Ben Dhia, Lirida Alves de Barros Naviner, Philippe Matherat
A new fault-tolerant architecture for CLBs in SRAM-based FPGAs. ICECS (2012)
Samuel N. Pagliarini, Arwa Ben Dhia, Lirida Alves de Barros Naviner, Jean-François Naviner
Automatic selective hardening against soft errors: A cost-based and regularity-aware approach. ICECS (2012)
Samuel N. Pagliarini, G. G. dos Santos, Lirida Alves de Barros Naviner, Jean-François Naviner
Exploring the feasibility of selective hardening for combinational logic. Microelectron. Reliab. 52 (9-10) (2012)
Ting An, Matteo Causo, Lirida Alves de Barros Naviner, Philippe Matherat
Transient fault analysis of CORDIC processor. ICECS (2012)
Tian Ban, Lirida Alves de Barros Naviner
Majority voter: Signal probability, reliability and error bound characteristics. MWSCAS (2012)
Lirida Alves de Barros Naviner, Jean-François Naviner, Denis Teixeira Franco, Maí Correia R. de Vasconcelos
Methods and Metrics for Reliability Assessment. Fault-Tolerant Distributed Algorithms on VLSI Chips (2008)
Elizabeth Colin, Lirida Alves de Barros Naviner
On baseband considerations for multistandard RF receivers. ICECS (2003)