A low cost reliable architecture for S-Boxes in AES processors.

Ting An Lirida Alves de Barros Naviner Philippe Matherat

Published in: DFTS (2013)

Keyphrases

s box
low cost
chaotic map
block cipher
encryption algorithm
cost effective
initial conditions
advanced encryption standard
real time
parallel architecture
design criteria
parallel algorithm
instruction set
low power
image encryption algorithm
processing elements
shared memory