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Robust Ultra-Low Power Non-Volatile Logic-in-Memory Circuits in FD-SOI Technology.
Hao Cai
You Wang
Lirida Alves de Barros Naviner
Weisheng Zhao
Published in:
IEEE Trans. Circuits Syst. I Regul. Pap. (2017)
Keyphrases
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random access memory
main memory
delay insensitive
logic synthesis
ultra low power
embedded dram
cost effective
digital circuits
asynchronous circuits
high speed
memory requirements
data processing
neural network
cmos technology
analog circuits
multi valued
file system
computer systems
shift register