Sylvain Engels

Publication Activity (10 Years)

Years Active: 2003-2023
Publications (10 Years): 9

Top Topics

Design Principles

Digital Technologies

Communication Cost

Top Venues

Publications

Cristiano Merio, Xavier Lesage, Ali Naimi, Sylvain Engels, Katell Morin-Allory, Laurent Fesquet
Method for Data-Driven Pruning in Micropipeline Circuits. VLSI-SoC (2023)
Alexis Rodrigo Iga Jadue, Sylvain Engels, Laurent Fesquet
A Novel Event-Based Method for ASK Demodulation. LASCAS (2022)
Alexis Rodrigo Iga Jadue, Sylvain Engels, Laurent Fesquet
Comparison between an ASK Event-Based Demodulation and a Digital IQ Demodulation. EBCCSP (2021)
Laurent Fesquet, Yoan Decoudu, Alexis Rodrigo Iga Jadue, Thiago Ferreira de Paiva Leite, Otto Aureliano Rolloff, M. Diallo, Rodrigo Possamai Bastos, Katell Morin-Allory, Sylvain Engels
A Distributed Body-Biasing Strategy for Asynchronous Circuits. VLSI-SoC (2019)
Alexis Rodrigo Iga Jadue, Sylvain Engels, Laurent Fesquet
A Digital Event-Based Strategy for ASK demodulation. VLSI-SoC (2019)
Alexis Rodrigo Iga Jadue, Sylvain Engels, Laurent Fesquet
An Event-Based Strategy for ASK demodulation. EBCCSP (2019)
Marc Renaudin, Aymane Bouzafour, Sylvain Engels, Robin Wilson
A 6-Wire Plug and Play Clockless Distributed On-Chip-Sensor Network in 28 nm UTBB FD-SOI. J. Low Power Electron. 14 (3) (2018)
Sophie Germain, Sylvain Engels, Laurent Fesquet
A Design Flow for Shaping Electromagnetic Emissions in Micropipeline Circuits. ASYNC (2018)
Sophie Germain, Sylvain Engels, Laurent Fesquet
Event-based design strategy for circuit electromagnetic compatibility. EBCCSP (2017)
Ivan Miro Panades, Edith Beigné, Yvain Thonnart, Laurent Alacoque, Pascal Vivet, Suzanne Lesecq, Diego Puschini, Anca Molnos, Farhat Thabet, Benoît Tain, Karim Ben Chehida, Sylvain Engels, Robin Wilson, Didier Fuin
A Fine-Grain Variation-Aware Dynamic Vdd-Hopping AVFS Architecture on a 32 nm GALS MPSoC. IEEE J. Solid State Circuits 49 (7) (2014)
Marc Renaudin, Aurélien Buhrig, Charles Guillemet, Robin Wilson, Sylvain Engels
Clockless Design Performance Monitoring for Nanometer Technologies. ASYNC (2014)
Edith Beigné, Alexandre Valentian, Bastien Giraud, Olivier Thomas, Thomas Benoist, Yvain Thonnart, Serge Bernard, Guillaume Moritz, Olivier Billoint, Y. Maneglia, Philippe Flatresse, Jean-Philippe Noel, Fady Abouzeid, Bertrand Pelloux-Prayer, Anuj Grover, Sylvain Clerc, Philippe Roche, Julien Le Coz, Sylvain Engels, Robin Wilson
Ultra-wide voltage range designs in fully-depleted silicon-on-insulator FETs. DATE (2013)
Philippe Flatresse, Bastien Giraud, Jean-Philippe Noel, Bertrand Pelloux-Prayer, Fabien Giner, Deepak-Kumar Arora, Franck Arnaud, Nicolas Planes, Julien Le Coz, Olivier Thomas, Sylvain Engels, Giorgio Cesana, Robin Wilson, Pascal Urard
Ultra-wide body-bias range LDPC decoder in 28nm UTBB FDSOI technology. ISSCC (2013)
Edith Beigné, Ivan Miro-Panades, Yvain Thonnart, Laurent Alacoque, Pascal Vivet, Suzanne Lesecq, Diego Puschini, Farhat Thabet, Benoît Tain, K. Benchehida, Sylvain Engels, Robin Wilson, Didier Fuin
A fine grain variation-aware dynamic Vdd-hopping AVFS architecture on a 32nm GALS MPSoC. ESSCIRC (2013)
N. Ruiz Amador, Vincent Huard, E. Pion, Florian Cacho, Damien Croain, V. Robert, Sylvain Engels, Philippe Flatresse, Lorena Anghel
Bottom-up digital system-level reliability modeling. CICC (2011)
Julien Le Coz, Philippe Flatresse, Sylvain Engels, Alexandre Valentian, Marc Belleville, Christine Raynaud, Damien Croain, Pascal Urard
Comparison of 65nm LP bulk and LP PD-SOI with adaptive power gate body bias for an LDPC codec. ISSCC (2011)
Nabila Moubdi, Philippe Maurine, Robin Wilson, Sylvain Engels, Nadine Azémard, Vincent Dumettier, Pierre Busson
On-Chip Process Variability Monitoring Flow. J. Low Power Electron. 6 (4) (2010)
V. Migairou, Robin Wilson, Sylvain Engels, Zeqin Wu, Nadine Azémard, Philippe Maurine
Timing margin evaluation with a simple statistical timing analysis flow. J. Embed. Comput. 3 (3) (2009)
Nabila Moubdi, Philippe Maurine, Robin Wilson, Nadine Azémard, Vincent Dumettier, Abhishek Bansal, Sebastien Barasinski, Alain Tournier, Guy Durieu, David Meyer, Pierre Busson, Sarah Verhaeren, Sylvain Engels
Product On-Chip Process Compensation for Low Power and Yield Enhancement. PATMOS (2009)
V. Migairou, Robin Wilson, Sylvain Engels, Zeqin Wu, Nadine Azémard, Philippe Maurine
A Simple Statistical Timing Analysis Flow and Its Application to Timing Margin Evaluation. PATMOS (2007)
Sylvain Engels, Robin Wilson, Nadine Azémard, Philippe Maurine
A comprehensive performance macro-modeling of on-chip RC interconnects considering line shielding effects. Integr. 39 (4) (2006)
B. Lasbouygues, Sylvain Engels, Robin Wilson, Philippe Maurine, Nadine Azémard, Daniel Auvergne
Logical effort model extension to propagation delay representation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25 (9) (2006)
V. Migairou, Robin Wilson, Sylvain Engels, Nadine Azémard, Philippe Maurine
Statistical Characterization of Library Timing Performance. PATMOS (2006)
B. Lasbouygues, J. Schindler, Sylvain Engels, Philippe Maurine, Nadine Azémard, Daniel Auvergne
Continuous representation of the performance of a CMOS library. ESSCIRC (2003)