Philipp Schläfer

Publication Activity (10 Years)

Years Active: 2012-2016
Publications (10 Years): 3

Top Venues

ReConFig

DATE

PIMRC

ICT

Kaiserslautern University of Technology, Germany (PHD)

Education History

Kaiserslautern University of Technology, Germany

PHD

Publications

Philipp Schläfer, Chu-Hsiang Huang, Clayton Schoeny, Christian Weis, Yao Li, Norbert Wehn, Lara Dolecek
Error resilience and energy efficiency: An LDPC decoder design study. DATE (2016)
Stefan Scholl, Philipp Schläfer, Norbert Wehn
Saturated min-sum decoding: An "afterburner" for LDPC decoder hardware. DATE (2016)
Vladimir Rybalkin, Philipp Schläfer, Norbert Wehn
A New Architecture for High Speed, Low Latency NB-LDPC Check Node Processing for GF(256). VTC Spring (2016)
Philipp Schläfer, Vladimir Rybalkin, Norbert Wehn, Matthias Alles, Timo Lehnigk-Emden, Emmanuel Boutillon
A new architecture for high throughput, low latency NB-LDPC check node processing. PIMRC (2015)
Philipp Schläfer, Norbert Wehn, Matthias Alles, Timo Lehnigk-Emden, Emmanuel Boutillon
Syndrome based check node processing of high order NB-LDPC decoders. ICT (2015)
Christian de Schryver, Philipp Schläfer, Norbert Wehn, Thomas Fischer, Arnd Poetzsch-Heffter
Loopy - An open-source TCP/IP rapid prototyping and validation framework. ReConFig (2013)
Philipp Schläfer, Norbert Wehn, Matthias Alles, Timo Lehnigk-Emden
A new dimension of parallelism in ultra high throughput LDPC decoding. SiPS (2013)
Christina Gimmler-Dumont, Philipp Schläfer, Norbert Wehn
ASIC implementation of a modified QR decomposition for tree search based MIMO detection. LASCAS (2013)
Christina Gimmler-Dumont, Philipp Schläfer, Norbert Wehn
FPGA-based rapid prototyping platform for MIMO-BICM design space exploration. ReConFig (2012)
Philipp Schläfer, Christian Weis, Norbert Wehn, Matthias Alles
Design Space of Flexible Multigigabit LDPC Decoders. VLSI Design 2012 (2012)

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Publication Activity (10 Years)

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Philipp Schläfer