Timing Analysis beyond Complementary CMOS Logic Styles.
Jan LappasMohamed Amine RiahiChristian WeisNorbert WehnSani R. NassifPublished in: ASPDAC (2024)
Keyphrases
- delay insensitive
- metal oxide semiconductor
- low cost
- random access memory
- logic programming
- multi valued
- power consumption
- modal logic
- low power
- chip design
- asynchronous circuits
- automated reasoning
- predicate logic
- circuit design
- high speed
- analog vlsi
- floating gate
- epistemic logic
- natural deduction
- proof theory
- vlsi circuits
- theorem prover
- database