G. Edward Suh

ORCID

Publication Activity (10 Years)

Years Active: 2001-2024
Publications (10 Years): 78

Top Venues

Massachusetts Institute of Technology, Cambridge, MA, USA (PHD)

Education History

Massachusetts Institute of Technology, Cambridge, MA, USA

PHD

Publications

Pengzhi Huang, Thang Hoang, Yueying Li, Elaine Shi, G. Edward Suh
Efficient Privacy-Preserving Machine Learning with Lightweight Trusted Hardware. Proc. Priv. Enhancing Technol. 2024 (4) (2024)
Juntaek Lim, Youngeun Kwon, Ranggi Hwang, Kiwan Maeng, G. Edward Suh, Minsoo Rhu
LazyDP: Co-Designing Algorithm-Software for Scalable Training of Differentially Private Recommendation Models. ASPLOS (2) (2024)
Yueying Li, Nikita Lazarev, David Koufaty, Tenny Yin, Andy Anderson, Zhiru Zhang, G. Edward Suh, Kostis Kaffes, Christina Delimitrou
LibPreemptible: Enabling Fast, Adaptive, and Hardware-Assisted User-Space Scheduling. HPCA (2024)
Maximilian Lam, Jeff Johnson, Wenjie Xiong, Kiwan Maeng, Udit Gupta, Yang Li, Liangzhen Lai, Ilias Leontiadis, Minsoo Rhu, Hsien-Hsin S. Lee, Vijay Janapa Reddi, Gu-Yeon Wei, David Brooks, G. Edward Suh
GPU-based Private Information Retrieval for On-Device Machine Learning Inference. ASPLOS (1) (2024)
Benjamin Wu, Aaron B. Wagner, Ibrahim Issa, G. Edward Suh
Strong Asymptotic Composition Theorems for Mutual Information Measures. IEEE Trans. Inf. Theory 70 (5) (2024)
Trishita Tiwari, Suchin Gururangan, Chuan Guo, Weizhe Hua, Sanjay Kariyappa, Udit Gupta, Wenjie Xiong, Kiwan Maeng, Hsien-Hsin S. Lee, G. Edward Suh
Information Flow Control in Machine Learning through Modular Model Architecture. USENIX Security Symposium (2024)
Kiwan Maeng, G. Edward Suh
Accelerating ReLU for MPC-Based Private Inference with a Communication-Efficient Sign Estimation. MLSys (2024)
Juntaek Lim, Youngeun Kwon, Ranggi Hwang, Kiwan Maeng, G. Edward Suh, Minsoo Rhu
LazyDP: Co-Designing Algorithm-Software for Scalable Training of Differentially Private Recommendation Models. CoRR (2024)
Kiwan Maeng, G. Edward Suh
Approximating ReLU on a Reduced Ring for Efficient MPC-based Private Inference. CoRR (2023)
Yueying Li, Nikita Lazarev, David Koufaty, Yijun Yin, Andy Anderson, Zhiru Zhang, G. Edward Suh, Kostis Kaffes, Christina Delimitrou
Towards Fast, Adaptive, and Hardware-Assisted User-Space Scheduling. CoRR (2023)
Kiwan Maeng, Chuan Guo, Sanjay Kariyappa, G. Edward Suh
Bounding the Invertibility of Privacy-preserving Instance Encoding using Fisher Information. NeurIPS (2023)
Maximilian Lam, Jeff Johnson, Wenjie Xiong, Kiwan Maeng, Udit Gupta, Minsoo Rhu, Hsien-Hsin S. Lee, Vijay Janapa Reddi, Gu-Yeon Wei, David Brooks, G. Edward Suh
GPU-based Private Information Retrieval for On-Device Machine Learning Inference. CoRR (2023)
Drew Zagieboylo, Charles Sherk, Andrew C. Myers, G. Edward Suh
SpecVerilog: Adapting Information Flow Control for Secure Speculation. CCS (2023)
Sanjay Kariyappa, Chuan Guo, Kiwan Maeng, Wenjie Xiong, G. Edward Suh, Moinuddin K. Qureshi, Hsien-Hsin S. Lee
Cocktail Party Attack: Breaking Aggregation-Based Privacy in Federated Learning Using Independent Component Analysis. ICML (2023)
Kiwan Maeng, Chuan Guo, Sanjay Kariyappa, G. Edward Suh
Bounding the Invertibility of Privacy-preserving Instance Encoding using Fisher Information. CoRR (2023)
Trishita Tiwari, Suchin Gururangan, Chuan Guo, Weizhe Hua, Sanjay Kariyappa, Udit Gupta, Wenjie Xiong, Kiwan Maeng, Hsien-Hsin S. Lee, G. Edward Suh
Information Flow Control in Machine Learning through Modular Model Architecture. CoRR (2023)
Jiaxun Cui, Xiaomeng Yang, Mulong Luo, Geunbae Lee, Peter Stone, Hsien-Hsin S. Lee, Benjamin Lee, G. Edward Suh, Wenjie Xiong, Yuandong Tian
MACTA: A Multi-agent Reinforcement Learning Approach for Cache Timing Attacks and Detection. ICLR (2023)
Yueying Li, Daochen Zha, Tianjun Zhang, G. Edward Suh, Christina Delimitrou, Francis Y. Yan
Mitigating Metastable Failures in Distributed Systems with Offline Reinforcement Learning. Tiny Papers @ ICLR (2023)
Mulong Luo, Wenjie Xiong, Geunbae Lee, Yueying Li, Xiaomeng Yang, Amy Zhang, Yuandong Tian, Hsien-Hsin S. Lee, G. Edward Suh
AutoCAT: Reinforcement Learning for Automated Exploration of Cache-Timing Attacks. HPCA (2023)
Weizhe Hua, Zhiru Zhang, G. Edward Suh
Reverse-Engineering CNN Models Using Side-Channel Attacks. IEEE Des. Test 39 (4) (2022)
Sanjay Kariyappa, Chuan Guo, Kiwan Maeng, Wenjie Xiong, G. Edward Suh, Moinuddin K. Qureshi, Hsien-Hsin S. Lee
Cocktail Party Attack: Breaking Aggregation-Based Privacy in Federated Learning using Independent Component Analysis. CoRR (2022)
Hanieh Hashemi, Wenjie Xiong, Liu Ke, Kiwan Maeng, Murali Annavaram, G. Edward Suh, Hsien-Hsin S. Lee
Data Leakage via Access Patterns of Sparse Features in Deep Learning-based Recommendation Systems. CoRR (2022)
Mulong Luo, G. Edward Suh
Accelerating Path Planning for Autonomous Driving with Hardware-Assisted Memorization. ASAP (2022)
Shaowei Zhu, Hyo Jin Kim, Maurizio Monge, G. Edward Suh, Armin Alaghi, Brandon Reagen, Vincent T. Lee
Verifiable Access Control for Augmented Reality Localization and Mapping. CoRR (2022)
Muhammad Umar, Weizhe Hua, Zhiru Zhang, G. Edward Suh
SoftVN: efficient memory protection via software-provided version numbers. ISCA (2022)
Weizhe Hua, Muhammad Umar, Zhiru Zhang, G. Edward Suh
MGX: near-zero overhead memory protection for data-intensive accelerators. ISCA (2022)
Weizhe Hua, Muhammad Umar, Zhiru Zhang, G. Edward Suh
GuardNN: secure accelerator architecture for privacy-preserving deep learning. DAC (2022)
Mulong Luo, G. Edward Suh
Accelerating Path Planning for Autonomous Driving with Hardware-Assisted Memoization. CoRR (2022)
Kiwan Maeng, Chuan Guo, Sanjay Kariyappa, G. Edward Suh
Measuring and Controlling Split Layer Privacy Leakage Using Fisher Information. CoRR (2022)
Yongqin Wang, G. Edward Suh, Wenjie Xiong, Benjamin Lefaudeux, Brian Knott, Murali Annavaram, Hsien-Hsin S. Lee
Characterization of MPC-based Private Inference for Transformer-based Models. ISPASS (2022)
Pengzhi Huang, Thang Hoang, Yueying Li, Elaine Shi, G. Edward Suh
STAMP: Lightweight TEE-Assisted MPC for Efficient Privacy-Preserving Machine Learning. CoRR (2022)
Wenjie Xiong, Liu Ke, Dimitrije Jankov, Michael Kounavis, Xiaochen Wang, Eric Northup, Jie Amy Yang, Bilge Acun, Carole-Jean Wu, Ping Tak Peter Tang, G. Edward Suh, Xuan Zhang, Hsien-Hsin S. Lee
SecNDP: Secure Near-Data Processing with Untrusted Memory. HPCA (2022)
Liu Ke, Xuan Zhang, Benjamin Lee, G. Edward Suh, Hsien-Hsin S. Lee
DisaggRec: Architecting Disaggregated Systems for Large-Scale Personalized Recommendation. CoRR (2022)
Yaohui Cai, Weizhe Hua, Hongzheng Chen, G. Edward Suh, Christopher De Sa, Zhiru Zhang
Structured Pruning is All You Need for Pruning CNNs at Initialization. CoRR (2022)
Mulong Luo, Wenjie Xiong, Geunbae Lee, Yueying Li, Xiaomeng Yang, Amy Zhang, Yuandong Tian, Hsien-Hsin S. Lee, G. Edward Suh
AutoCAT: Reinforcement Learning for Automated Exploration of Cache Timing-Channel Attacks. CoRR (2022)
Wenjie Xiong, Liu Ke, Dimitrije Jankov, Michael Kounavis, Xiaochen Wang, Eric Northup, Jie Amy Yang, Bilge Acun, Carole-Jean Wu, Ping Tak Peter Tang, G. Edward Suh, Xuan Zhang, Hsien-Hsin S. Lee
SecNDP: Secure Near-Data Processing with Untrusted Memory. IACR Cryptol. ePrint Arch. 2021 (2021)
Weizhe Hua, Yichi Zhang, Chuan Guo, Zhiru Zhang, G. Edward Suh
BulletTrain: Accelerating Robust Neural Network Training via Boundary Example Mining. CoRR (2021)
Benjamin Wu, Trishita Tiwari, G. Edward Suh, Aaron B. Wagner
Guessing Outputs of Dynamically Pruned CNNs Using Memory Access Patterns. IEEE Comput. Archit. Lett. 20 (2) (2021)
Alexander S. La Cour, Khurram K. Afridi, G. Edward Suh
Wireless Charging Power Side-Channel Attacks. CoRR (2021)
Alexander S. La Cour, Khurram K. Afridi, G. Edward Suh
Wireless Charging Power Side-Channel Attacks. CCS (2021)
Sungbo Park, Ingab Kang, Yaebin Moon, Jung Ho Ahn, G. Edward Suh
BCD deduplication: effective memory compression using partial cache-line deduplication. ASPLOS (2021)
Yanqi Zhang, Weizhe Hua, Zhuangzhuang Zhou, G. Edward Suh, Christina Delimitrou
Sinan: Data-Driven, QoS-Aware Cluster Management for Microservices. CoRR (2021)
Yanqi Zhang, Weizhe Hua, Zhuangzhuang Zhou, G. Edward Suh, Christina Delimitrou
Sinan: ML-based and QoS-aware resource management for cloud microservices. ASPLOS (2021)
Weizhe Hua, Yichi Zhang, Chuan Guo, Zhiru Zhang, G. Edward Suh
BulletTrain: Accelerating Robust Neural Network Training via Boundary Example Mining. NeurIPS (2021)
Drew Zagieboylo, G. Edward Suh, Andrew C. Myers
The Cost of Software-Based Memory Management Without Virtual Memory. CoRR (2020)
Jacopo Banfi, Yizhou Zhang, G. Edward Suh, Andrew C. Myers, Mark E. Campbell
Path Planning Under Malicious Injections and Removals of Perceived Obstacles: A Probabilistic Programming Approach. IEEE Robotics Autom. Lett. 5 (4) (2020)
Weizhe Hua, Muhammad Umar, Zhiru Zhang, G. Edward Suh
GuardNN: Secure DNN Accelerator for Privacy-Preserving Deep Learning. CoRR (2020)
Yichi Zhang, Ritchie Zhao, Weizhe Hua, Nayun Xu, G. Edward Suh, Zhiru Zhang
Precision Gating: Improving Neural Network Efficiency with Dynamic Dual-Precision Activations. CoRR (2020)
Mohamed Ismail, G. Edward Suh
Efficient nursery sizing for managed languages on multi-core processors with shared caches. CGO (2020)
Benjamin Wu, Aaron B. Wagner, G. Edward Suh
A Case for Maximal Leakage as a Side Channel Leakage Metric. CoRR (2020)
Yichi Zhang, Ritchie Zhao, Weizhe Hua, Nayun Xu, G. Edward Suh, Zhiru Zhang
Precision Gating: Improving Neural Network Efficiency with Dynamic Dual-Precision Activations. ICLR (2020)
Benjamin Wu, Aaron B. Wagner, G. Edward Suh, Ibrahim Issa
Strong Asymptotic Composition Theorems for Sibson Mutual Information. CoRR (2020)
Weizhe Hua, Muhammad Umar, Zhiru Zhang, G. Edward Suh
MgX: Near-Zero Overhead Memory Protection with an Application to Secure DNN Acceleration. CoRR (2020)
Benjamin Wu, Aaron B. Wagner, G. Edward Suh
Optimal Mechanisms Under Maximal Leakage. CNS (2020)
Mulong Luo, Andrew C. Myers, G. Edward Suh
Stealthy Tracking of Autonomous Vehicles with Cache Side Channels. USENIX Security Symposium (2020)
Benjamin Wu, Aaron B. Wagner, G. Edward Suh, Ibrahim Issa
Strong Asymptotic Composition Theorems for Sibson Mutual Information. ISIT (2020)
Zhenghong Jiang, Hanchen Jin, G. Edward Suh, Zhiru Zhang
Designing Secure Cryptographic Accelerators with Information Flow Enforcement: A Case Study on AES. DAC (2019)
Weizhe Hua, Yuan Zhou, Christopher De Sa, Zhiru Zhang, G. Edward Suh
Channel Gating Neural Networks. NeurIPS (2019)
Eojin Lee, Ingab Kang, Sukhan Lee, G. Edward Suh, Jung Ho Ahn
TWiCe: preventing row-hammering by exploiting time window counters. ISCA (2019)
Drew Zagieboylo, G. Edward Suh, Andrew C. Myers
Using Information Flow to Design an ISA that Controls Timing Channels. CSF (2019)
Weizhe Hua, Yuan Zhou, Christopher De Sa, Zhiru Zhang, G. Edward Suh
Boosting the Performance of CNN Accelerators with Dynamic Fine-Grained Channel Gating. MICRO (2019)
Mark Zhao, G. Edward Suh
FPGA-Based Remote Power Side-Channel Attacks. IEEE Symposium on Security and Privacy (2018)
Mohamed Ismail, G. Edward Suh
Hardware-software co-optimization of memory management in dynamic languages. ISMM (2018)
Jed Liu, Joe Corbett-Davies, Andrew Ferraiuolo, Alexander Ivanov, Mulong Luo, G. Edward Suh, Andrew C. Myers, Mark E. Campbell
Secure Autonomous Cyber-Physical Systems Through Verifiable Information Flow Control. CPS-SPC@CCS (2018)
Andrew Ferraiuolo, Mark Zhao, Andrew C. Myers, G. Edward Suh
HyperFlow: A Processor Architecture for Nonmalleable, Timing-Safe Information Flow Security. CCS (2018)
Weizhe Hua, Christopher De Sa, Zhiru Zhang, G. Edward Suh
Channel Gating Neural Networks. CoRR (2018)
Zhenghong Jiang, Steve Dai, G. Edward Suh, Zhiru Zhang
High-level synthesis with timing-sensitive information flow enforcement. ICCAD (2018)
Mohamed Ismail, G. Edward Suh
Quantitative Overhead Analysis for Python. IISWC (2018)
Tao Chen, Shreesha Srinath, Christopher Batten, G. Edward Suh
An Architectural Framework for Accelerating Dynamic Parallel Algorithms on Reconfigurable Hardware. MICRO (2018)
Weizhe Hua, Zhiru Zhang, G. Edward Suh
Reverse engineering convolutional neural networks through side-channel information leaks. DAC (2018)
Eojin Lee, Sukhan Lee, G. Edward Suh, Jung Ho Ahn
TWiCe: Time Window Counter Based Row Refresh to Prevent Row-Hammering. IEEE Comput. Archit. Lett. 17 (1) (2018)
Yao Wang, Benjamin Wu, G. Edward Suh
Secure Dynamic Memory Scheduling Against Timing Channel Attacks. HPCA (2017)
Andrew Ferraiuolo, Weizhe Hua, Andrew C. Myers, G. Edward Suh
Secure Information Flow Verification with Mutable Dependent Types. DAC (2017)
Andrew Ferraiuolo, Rui Xu, Danfeng Zhang, Andrew C. Myers, G. Edward Suh
Verification of a Practical Hardware Security Architecture Through Static Information Flow Analysis. ASPLOS (2017)
Taejoon Song, Daniel Lo, G. Edward Suh
Prediction-Guided Performance-Energy Trade-off with Continuous Run-Time Adaptation. ISLPED (2016)
Tao Chen, G. Edward Suh
Efficient data supply for hardware accelerators with prefetching and access/execute decoupling. MICRO (2016)
Andrew Ferraiuolo, Yao Wang, Danfeng Zhang, Andrew C. Myers, G. Edward Suh
Lattice priority scheduling: Low-overhead timing-channel protection for a shared memory controller. HPCA (2016)
Yao Wang, Andrew Ferraiuolo, Danfeng Zhang, Andrew C. Myers, G. Edward Suh
SecDCP: secure dynamic cache partitioning for efficient timing channel protection. DAC (2016)
Tao Chen, Alexander Rucker, G. Edward Suh
Execution time prediction for energy-efficient hardware accelerators. MICRO (2015)
Danfeng Zhang, Yao Wang, G. Edward Suh, Andrew C. Myers
A Hardware Design Language for Timing-Sensitive Information-Flow Security. ASPLOS (2015)
Daniel Lo, Taejoon Song, G. Edward Suh
Prediction-guided performance-energy trade-off for interactive applications. MICRO (2015)
Mohamed Ismail, Daniel Lo, G. Edward Suh
Improving worst-case cache performance through selective bypassing and register-indexed cache. DAC (2015)
Daniel Lo, Tao Chen, Mohamed Ismail, G. Edward Suh
Run-time monitoring with adjustable overhead using dataflow-guided filtering. HPCA (2015)
Daniel Lo, Mohamed Ismail, Tao Chen, G. Edward Suh
Slack-aware opportunistic monitoring for real-time systems. RTAS (2014)
Ruirui C. Huang, Erik Halberg, Andrew Ferraiuolo, G. Edward Suh
Low-overhead and high coverage run-time race detection through selective meta-data management. HPCA (2014)
G. Edward Suh, Christopher W. Fletcher, Dwaine E. Clarke, Blaise Gassend, Marten van Dijk, Srinivas Devadas
Author retrospective AEGIS: architecture for tamper-evident and tamper-resistant processing. ICS 25th Anniversary (2014)
G. Edward Suh, George Kurian, Srinivas Devadas, Larry Rudolph
Author retrospective for analytical cache models with applications to cache partitioning. ICS 25th Anniversary (2014)
Yao Wang, Andrew Ferraiuolo, G. Edward Suh
Timing channel protection for a shared memory controller. HPCA (2014)
Michel A. Kinsy, Myong Hyon Cho, Keun Sup Shim, Mieszko Lis, G. Edward Suh, Srinivas Devadas
Optimal and Heuristic Application-Aware Oblivious Routing. IEEE Trans. Computers 62 (1) (2013)
Nithin Michael, Yao Wang, G. Edward Suh, Ao Tang
Quadrisection-based task mapping on many-core processors for energy-efficient on-chip communication. NOCS (2013)
Ruirui C. Huang, Erik Halberg, G. Edward Suh
Non-race concurrency bug detection through order-sensitive critical sections. ISCA (2013)
Yinglei Wang, Wing-Kei S. Yu, Sarah Q. Xu, Edwin Kan, G. Edward Suh
Hiding Information in Flash Memory. IEEE Symposium on Security and Privacy (2013)
Daniel Lo, G. Edward Suh
Worst-case execution time analysis for parallel run-time monitoring. DAC (2012)
Ruby B. Lee, Simha Sethumadhavan, G. Edward Suh
Hardware enhanced security. CCS (2012)
Yinglei Wang, Wing-Kei S. Yu, Shuo Wu, Greg Malysa, G. Edward Suh, Edwin Kan
Flash Memory for Ubiquitous Hardware Security Functions: True Random Number Generation and Device Fingerprints. IEEE Symposium on Security and Privacy (2012)
Yao Wang, G. Edward Suh
Efficient Timing Channel Protection for On-Chip Networks. NOCS (2012)
Nithin Michael, Ao Tang, G. Edward Suh
On the performance of averaged optimal routing. CISS (2012)
Mohamed Ismail, G. Edward Suh
Fast development of hardware-based run-time monitors through architecture framework and high-level synthesis. ICCD (2012)
Daniel Y. Deng, G. Edward Suh
High-performance parallel accelerator for flexible and efficient run-time monitoring. DSN (2012)
Wing-Kei S. Yu, Shantanu Rajwade, Sung-En Wang, Bob Lian, G. Edward Suh, Edwin Kan
A non-volatile microcontroller with integrated floating-gate transistors. DSN Workshops (2011)

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Publication Activity (10 Years)

Top Topics

Top Venues

G. Edward Suh