Jung Ho Ahn

ORCID

Publication Activity (10 Years)

Years Active: 2003-2024
Publications (10 Years): 83

Top Venues

CoRR

IEEE Comput. Archit. Lett.

HPCA

ISCA

Publications

Yesin Ryu, Yoojin Kim, Giyong Jung, Jung Ho Ahn, Jungrae Kim
Native DRAM Cache: Re-architecting DRAM as a Large-Scale Cache for Data Centers. ISCA (2024)
Hwayong Nam, Seungmin Baek, Minbok Wi, Michael Jaemin Kim, Jaehyun Park, Chihun Song, Nam Sung Kim, Jung Ho Ahn
DRAMScope: Uncovering DRAM Microarchitecture and Characteristics by Issuing Memory Commands. ISCA (2024)
Chihun Song, Michael Jaemin Kim, Tianchen Wang, Houxiang Ji, Jinghan Huang, Ipoom Jeong, Jaehyun Park, Hwayong Nam, Minbok Wi, Jung Ho Ahn, Nam Sung Kim
TAROT: A CXL SmartNIC-Based Defense Against Multi-bit Errors by Row-Hammer Attacks. ASPLOS (3) (2024)
Jaewan Choi, Jaehyun Park, Kwanhee Kyung, Nam Sung Kim, Jung Ho Ahn
Unleashing the Potential of PIM: Accelerating Large Batched Inference of Transformer-Based Generative Models. HPCA (2024)
Jongmin Kim, Wonseok Choi, Jung Ho Ahn
Cheddar: A Swift Fully Homomorphic Encryption Library for CUDA GPUs. CoRR (2024)
Sungmin Yun, Hwayong Nam, Kwanhee Kyung, Jaehyun Park, Byeongho Kim, Yongsuk Kwon, Eojin Lee, Jung Ho Ahn
CLAY: CXL-based Scalable NDP Architecture Accelerating Embedding Layers. ICS (2024)
Sangsoo Park, KyungSoo Kim, Jinin So, Jin Jung, Jonggeon Lee, Kyoungwan Woo, Nayeon Kim, Younghyun Lee, Hyungyo Kim, Yongsuk Kwon, Jinhyun Kim, Jieun Lee, YeonGon Cho, Yongmin Tai, Jeonghyeon Cho, Hoyoung Song, Jung Ho Ahn, Nam Sung Kim
An LPDDR-based CXL-PNM Platform for TCO-efficient Inference of Transformer-based Large Language Models. HPCA (2024)
Donghwan Kim, Jaiyoung Park, Jongmin Kim, Sangpyo Kim, Jung Ho Ahn
HyPHEN: A Hybrid Packing Method and Its Optimizations for Homomorphic Encryption-Based Neural Networks. IEEE Access 12 (2024)
Hwayong Nam, Seungmin Baek, Minbok Wi, Michael Jaemin Kim, Jaehyun Park, Chihun Song, Nam Sung Kim, Jung Ho Ahn
DRAMScope: Uncovering DRAM Microarchitecture and Characteristics by Issuing Memory Commands. CoRR (2024)
Jaehyun Park, Jaewan Choi, Kwanhee Kyung, Michael Jaemin Kim, Yongsuk Kwon, Nam Sung Kim, Jung Ho Ahn
AttAcc! Unleashing the Power of PIM for Batched Transformer-based Generative Model Inference. ASPLOS (2) (2024)
Jaiyoung Park, Donghwan Kim, Jongmin Kim, Sangpyo Kim, Wonkyung Jung, Jung Hee Cheon, Jung Ho Ahn
Toward Practical Privacy-Preserving Convolutional Neural Networks Exploiting Fully Homomorphic Encryption. CoRR (2023)
Rashmi Agrawal, Jung Ho Ahn, Flavio Bergamaschi, Ro Cammarota, Jung Hee Cheon, Fillipe D. M. de Souza, Huijing Gong, Minsik Kang, Duhyeong Kim, Jongmin Kim, Hubert de Lassus, Jai Hyun Park, Michael Steiner, Wen Wang
High-precision RNS-CKKS on fixed but smaller word-size architectures: theory and application. IACR Cryptol. ePrint Arch. 2023 (2023)
Jongmin Kim, Sangpyo Kim, Jaewan Choi, Jaiyoung Park, Donghwan Kim, Jung Ho Ahn
SHARP: A Short-Word Hierarchical Accelerator for Robust and Practical Fully Homomorphic Encryption. ISCA (2023)
Michael Jaemin Kim, Minbok Wi, Jaehyun Park, Seoyoung Ko, Jaeyoung Choi, Hwayong Nam, Nam Sung Kim, Jung Ho Ahn, Eojin Lee
How to Kill the Second Bird with One ECC: The Pursuit of Row Hammer Resilient DRAM. MICRO (2023)
Hailong Li, Jaewan Choi, Yongsuk Kwon, Jung Ho Ahn
A Hardware-Friendly Tiled Singular-Value Decomposition-Based Matrix Multiplication for Transformer-Based Models. IEEE Comput. Archit. Lett. 22 (2) (2023)
Rashmi Agrawal, Jung Ho Ahn, Flavio Bergamaschi, Ro Cammarota, Jung Hee Cheon, Fillipe D. M. de Souza, Huijing Gong, Minsik Kang, Duhyeong Kim, Jongmin Kim, Hubert de Lassus, Jai Hyun Park, Michael Steiner, Wen Wang
High-precision RNS-CKKS on fixed but smaller word-size architectures: theory and application. WAHC@CCS (2023)
Sangpyo Kim, Jongmin Kim, Jaeyoung Choi, Jung Ho Ahn
CiFHER: A Chiplet-Based FHE Accelerator with a Resizable Structure. CoRR (2023)
Dana Vantrease, Robert Schreiber, Matteo Monchiero, Moray McLaren, Norman P. Jouppi, Marco Fiorentino, Al Davis, Nathan L. Binkert, Raymond G. Beausoleil, Jung Ho Ahn
Corona: System Implications of Emerging Nanophotonic Technology. CoRR (2023)
Yaebin Moon, Wanju Doh, Kwanhee Kyung, Eojin Lee, Jung Ho Ahn
ADT: Aggressive Demotion and Promotion for Tiered Memory. IEEE Comput. Archit. Lett. 22 (1) (2023)
Yan Sun, Yifan Yuan, Zeduo Yu, Reese Kuper, Chihun Song, Jinghan Huang, Houxiang Ji, Siddharth Agarwal, Jiaqi Lou, Ipoom Jeong, Ren Wang, Jung Ho Ahn, Tianyin Xu, Nam Sung Kim
Demystifying CXL Memory with Genuine CXL-Ready Systems and Devices. MICRO (2023)
Hwayong Nam, Seungmin Baek, Minbok Wi, Michael Jaemin Kim, Jaehyun Park, Chihun Song, Nam Sung Kim, Jung Ho Ahn
X-ray: Discovering DRAM Internal Structure and Error Characteristics by Issuing Memory Commands. CoRR (2023)
Deok-Jae Oh, Yaebin Moon, Do Kyu Ham, Tae Jun Ham, Yongjun Park, Jae W. Lee, Jung Ho Ahn, Eojin Lee
MaPHeA: A Framework for Lightweight Memory Hierarchy-aware Profile-guided Heap Allocation. ACM Trans. Embed. Comput. Syst. 22 (1) (2023)
Jaewan Choi, Jaehyun Park, Kwanhee Kyung, Nam Sung Kim, Jung Ho Ahn
Unleashing the Potential of PIM: Accelerating Large Batched Inference of Transformer-Based Generative Models. IEEE Comput. Archit. Lett. 22 (2) (2023)
Jae Hyung Ju, Jaiyoung Park, Jongmin Kim, Donghwan Kim, Jung Ho Ahn
NeuJeans: Private Neural Network Inference with Joint Optimization of Convolution and Bootstrapping. CoRR (2023)
Donghwan Kim, Jaiyoung Park, Jongmin Kim, Sangpyo Kim, Jung Ho Ahn
HyPHEN: A Hybrid Packing Method and Optimizations for Homomorphic Encryption-Based Neural Networks. CoRR (2023)
Minbok Wi, Jaehyun Park, Seoyoung Ko, Michael Jaemin Kim, Nam Sung Kim, Eojin Lee, Jung Ho Ahn
SHADOW: Preventing Row Hammer in DRAM with Intra-Subarray Row Shuffling. HPCA (2023)
Dana Vantrease, Robert Schreiber, Matteo Monchiero, Moray McLaren, Norman P. Jouppi, Marco Fiorentino, Al Davis, Nathan L. Binkert, Raymond G. Beausoleil, Jung Ho Ahn
RETROSPECTIVE: Corona: System Implications of Emerging Nanophotonic Technology. CoRR (2023)
Hwayong Nam, Seungmin Baek, Minbok Wi, Michael Jaemin Kim, Jaehyun Park, Chihun Song, Nam Sung Kim, Jung Ho Ahn
X-ray: Discovering DRAM Internal Structure and Error Characteristics by Issuing Memory Commands. IEEE Comput. Archit. Lett. 22 (2) (2023)
Hailong Li, Jaewan Choi, Jung Ho Ahn
A Slice and Dice Approach to Accelerate Compound Sparse Attention on GPU. IISWC (2022)
Sungmin Yun, Byeongho Kim, Jaehyun Park, Hwayong Nam, Jung Ho Ahn, Eojin Lee
GraNDe: Near-Data Processing Architecture With Adaptive Matrix Mapping for Graph Convolutional Networks. IEEE Comput. Archit. Lett. 21 (2) (2022)
Jongmin Kim, Gwangho Lee, Sangpyo Kim, Gina Sohn, John Kim, Minsoo Rhu, Jung Ho Ahn
ARK: Fully Homomorphic Encryption Accelerator with Runtime Data Generation and Inter-Operation Key Reuse. CoRR (2022)
Jongmin Kim, Gwangho Lee, Sangpyo Kim, Gina Sohn, Minsoo Rhu, John Kim, Jung Ho Ahn
ARK: Fully Homomorphic Encryption Accelerator with Runtime Data Generation and Inter-Operation Key Reuse. MICRO (2022)
Jaewan Choi, Hailong Li, Byeongho Kim, Seunghwan Hwang, Jung Ho Ahn
Accelerating Transformer Networks through Recomposing Softmax Layers. IISWC (2022)
Sunjung Lee, Jaewan Choi, Wonkyung Jung, Byeongho Kim, Jaehyun Park, Hweesoo Kim, Jung Ho Ahn
MVP: An Efficient CNN Accelerator with Matrix, Vector, and Processing-Near-Memory Units. ACM Trans. Design Autom. Electr. Syst. 27 (5) (2022)
Michael Jaemin Kim, Jaehyun Park, Yeonhong Park, Wanju Doh, Namhoon Kim, Tae Jun Ham, Jae W. Lee, Jung Ho Ahn
Mithril: Cooperative Row Hammer Protection on Commodity DRAM Leveraging Managed Refresh. HPCA (2022)
Sangpyo Kim, Jongmin Kim, Michael Jaemin Kim, Wonkyung Jung, John Kim, Minsoo Rhu, Jung Ho Ahn
BTS: an accelerator for bootstrappable fully homomorphic encryption. ISCA (2022)
Sunjung Lee, Seunghwan Hwang, Michael Jaemin Kim, Jaewan Choi, Jung Ho Ahn
Future Scaling of Memory Hierarchy for Tensor Cores and Eliminating Redundant Shared Memory Traffic Using Inter-Warp Multicasting. IEEE Trans. Computers 71 (12) (2022)
Jaiyoung Park, Michael Jaemin Kim, Wonkyung Jung, Jung Ho Ahn
AESPA: Accuracy Preserving Low-degree Polynomial Activation for Fast Private Inference. CoRR (2022)
Wonkyung Jung, Eojin Lee, Sangpyo Kim, Jongmin Kim, Namhoon Kim, Keewoo Lee, Chohong Min, Jung Hee Cheon, Jung Ho Ahn
Accelerating Fully Homomorphic Encryption Through Architecture-Centric Analysis and Optimization. IEEE Access 9 (2021)
Hweesoo Kim, Sunjung Lee, Jaewan Choi, Jung Ho Ahn
Row-Streaming Dataflow Using a Chaining Buffer and Systolic Array+ Structure. IEEE Comput. Archit. Lett. 20 (1) (2021)
Jaehyun Park, Byeongho Kim, Sungmin Yun, Eojin Lee, Minsoo Rhu, Jung Ho Ahn
TRiM: Enhancing Processor-Memory Interfaces with Scalable Tensor Reduction in Memory. MICRO (2021)
Michael Jaemin Kim, Jaehyun Park, Yeonhong Park, Wanju Doh, Namhoon Kim, Tae Jun Ham, Jae W. Lee, Jung Ho Ahn
Mithril: Cooperative Row Hammer Protection on Commodity DRAM Leveraging Managed Refresh. CoRR (2021)
Sangpyo Kim, Jongmin Kim, Michael Jaemin Kim, Wonkyung Jung, Minsoo Rhu, John Kim, Jung Ho Ahn
BTS: An Accelerator for Bootstrappable Fully Homomorphic Encryption. CoRR (2021)
Wonkyung Jung, Sangpyo Kim, Jung Ho Ahn, Jung Hee Cheon, Younho Lee
Over 100x Faster Bootstrapping in Fully Homomorphic Encryption through Memory-centric Optimization with GPUs. IACR Cryptol. ePrint Arch. 2021 (2021)
Deok-Jae Oh, Yaebin Moon, Eojin Lee, Tae Jun Ham, Yongjun Park, Jae W. Lee, Jung Ho Ahn
MaPHeA: a lightweight memory hierarchy-aware profile-guided heap allocation framework. LCTES (2021)
Byeongho Kim, Jaehyun Park, Eojin Lee, Minsoo Rhu, Jung Ho Ahn
TRiM: Tensor Reduction in Memory. IEEE Comput. Archit. Lett. 20 (1) (2021)
Wonkyung Jung, Eojin Lee, Sangpyo Kim, Namhoon Kim, Keewoo Lee, Chohong Min, Jung Hee Cheon, Jung Ho Ahn
Accelerating Fully Homomorphic Encryption Through Microarchitecture-Aware Analysis and Optimization. ISPASS (2021)
Wonkyung Jung, Sangpyo Kim, Jung Ho Ahn, Jung Hee Cheon, Younho Lee
Over 100x Faster Bootstrapping in Fully Homomorphic Encryption through Memory-centric Optimization with GPUs. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2021 (4) (2021)
Sungbo Park, Ingab Kang, Yaebin Moon, Jung Ho Ahn, G. Edward Suh
BCD deduplication: effective memory compression using partial cache-line deduplication. ASPLOS (2021)
Ingab Kang, Eojin Lee, Jung Ho Ahn
CAT-TWO: Counter-Based Adaptive Tree, Time Window Optimized for DRAM Row-Hammer Prevention. IEEE Access 8 (2020)
Wonkyung Jung, Eojin Lee, Sangpyo Kim, Keewoo Lee, Namhoon Kim, Chohong Min, Jung Hee Cheon, Jung Ho Ahn
HEAAN Demystified: Accelerating Fully Homomorphic Encryption Through Architecture-centric Analysis and Optimization. CoRR (2020)
Sangpyo Kim, Wonkyung Jung, Jaiyoung Park, Jung Ho Ahn
Accelerating Number Theoretic Transformations for Bootstrappable Homomorphic Encryption on GPUs. IISWC (2020)
Byeongho Kim, Jongwook Chung, Eojin Lee, Wonkyung Jung, Sunjung Lee, Jaewan Choi, Jaehyun Park, Minbok Wi, Sukhan Lee, Jung Ho Ahn
MViD: Sparse Matrix-Vector Multiplication in Mobile DRAM for Accelerating Recurrent Neural Networks. IEEE Trans. Computers 69 (7) (2020)
Yeonhong Park, Woosuk Kwon, Eojin Lee, Tae Jun Ham, Jung Ho Ahn, Jae W. Lee
Graphene: Strong yet Lightweight Row Hammer Protection. MICRO (2020)
Sangpyo Kim, Wonkyung Jung, Jaiyoung Park, Jung Ho Ahn
Accelerating Number Theoretic Transformations for Bootstrappable Homomorphic Encryption on GPUs. CoRR (2020)
Jongwook Chung, Yuhwan Ro, Joonsung Kim, Jaehyung Ahn, Jangwoo Kim, John Kim, Jae W. Lee, Jung Ho Ahn
Enforcing Last-Level Cache Partitioning through Memory Virtual Channels. PACT (2019)
Wonkyung Jung, Daejin Jung, Byeongho Kim, Sunjung Lee, Wonjong Rhee, Jung Ho Ahn
Restructuring Batch Normalization to Accelerate CNN Training. MLSys (2019)
Eojin Lee, Ingab Kang, Sukhan Lee, G. Edward Suh, Jung Ho Ahn
TWiCe: preventing row-hammering by exploiting time window counters. ISCA (2019)
Sukhan Lee, Hyunyoon Cho, Young Hoon Son, Yuhwan Ro, Nam Sung Kim, Jung Ho Ahn
Leveraging Power-Performance Relationship of Energy-Efficient Modern DRAM Devices. IEEE Access 6 (2018)
Sukhan Lee, Kiwon Lee, Min Chul Sung, Mohammad Alian, Chankyung Kim, Wooyeong Cho, Reum Oh, Seongil O, Jung Ho Ahn, Nam Sung Kim
3D-Xpath: high-density managed DRAM architecture with cost-effective alternative paths for memory transactions. PACT (2018)
Daejin Jung, Sunjung Lee, Wonjong Rhee, Jung Ho Ahn
Partitioning Compute Units in CNN Acceleration for Statistical Memory Traffic Shaping. IEEE Comput. Archit. Lett. 17 (1) (2018)
Daejin Jung, Sunjung Lee, Wonjong Rhee, Jung Ho Ahn
Partitioning Compute Units in CNN Acceleration for Statistical Memory Traffic Shaping. CoRR (2018)
Grant Ayers, Jung Ho Ahn, Christos Kozyrakis, Parthasarathy Ranganathan
Memory Hierarchy for Web Search. HPCA (2018)
Daejin Jung, Wonkyung Jung, Byeongho Kim, Sunjung Lee, Wonjong Rhee, Jung Ho Ahn
Restructuring Batch Normalization to Accelerate CNN Training. CoRR (2018)
Eojin Lee, Sukhan Lee, G. Edward Suh, Jung Ho Ahn
TWiCe: Time Window Counter Based Row Refresh to Prevent Row-Hammering. IEEE Comput. Archit. Lett. 17 (1) (2018)
Jinho Lee, Jongwook Chung, Jung Ho Ahn, Kiyoung Choi
Excavating the Hidden Parallelism Inside DRAM Architectures With Buffered Compares. IEEE Trans. Very Large Scale Integr. Syst. 25 (6) (2017)
WonJun Song, Hyungjoon Jung, Jung Ho Ahn, Jae W. Lee, John Kim
Evaluation of Performance Unfairness in NUMA System Architecture. IEEE Comput. Archit. Lett. 16 (1) (2017)
Yuhwan Ro, Min Chul Sung, Yongjun Park, Jung Ho Ahn
Selective DRAM cache bypassing for improving bandwidth on DRAM/NVM hybrid main memory systems. IEICE Electron. Express 14 (11) (2017)
Eojin Lee, Jongwook Chung, Daejin Jung, Sukhan Lee, Sheng Li, Jung Ho Ahn
Work as a team or individual: Characterizing the system-level impacts of main memory partitioning. IISWC (2017)
Sukhan Lee, Yuhwan Ro, Young Hoon Son, Hyunyoon Cho, Nam Sung Kim, Jung Ho Ahn
Understanding power-performance relationship of energy-efficient modern DRAM devices. IISWC (2017)
WonJun Song, Gwangsun Kim, Hyungjoon Jung, Jongwook Chung, Jung Ho Ahn, Jae W. Lee, John Kim
History-Based Arbitration for Fairness in Processor-Interconnect of NUMA Servers. ASPLOS (2017)
Young Hoon Son, Hyunyoon Cho, Yuhwan Ro, Jae W. Lee, Jung Ho Ahn
SALAD: Achieving Symmetric Access Latency with Asymmetric DRAM Architecture. IEEE Comput. Archit. Lett. 16 (1) (2017)
Yuhwan Ro, Hyunyoon Cho, Eojin Lee, Daejin Jung, Young Hoon Son, Jung Ho Ahn, Jae W. Lee
SOUP-N-SALAD: Allocation-Oblivious Access Latency Reduction with Asymmetric DRAM Microarchitectures. HPCA (2017)
Sang-uhn Cha, Seongil O, Hyunsung Shin, Sangjoon Hwang, Kwang-Il Park, Seong-Jin Jang, Joo-Sun Choi, Gyo-Young Jin, Young Hoon Son, Hyunyoon Cho, Jung Ho Ahn, Nam Sung Kim
Defect Analysis and Cost-Effective Resilience Architecture for Future DRAM Devices. HPCA (2017)
Sheng Li, Hyeontaek Lim, Victor W. Lee, Jung Ho Ahn, Anuj Kalia, Michael Kaminsky, David G. Andersen, Seongil O, Sukhan Lee, Pradeep Dubey
Full-Stack Architecting to Achieve a Billion-Requests-Per-Second Throughput on a Single Key-Value Store Server Platform. ACM Trans. Comput. Syst. 34 (2) (2016)
Jinho Lee, Jung Ho Ahn, Kiyoung Choi
Buffered compares: Excavating the hidden parallelism inside DRAM architectures with lightweight logic. DATE (2016)
Sheng Li, Hyeontaek Lim, Victor W. Lee, Jung Ho Ahn, Anuj Kalia, Michael Kaminsky, David G. Andersen, Seongil O, Sukhan Lee, Pradeep Dubey
Achieving One Billion Key-Value Requests per Second on a Single Server. IEEE Micro 36 (3) (2016)
Hadi Asghari Moghaddam, Young Hoon Son, Jung Ho Ahn, Nam Sung Kim
Chameleon: Versatile and practical near-DRAM acceleration architecture for large memory systems. MICRO (2016)
Daejin Jung, Sheng Li, Jung Ho Ahn
Large Pages on Steroids: Small Ideas to Accelerate Big Memory Applications. IEEE Comput. Archit. Lett. 15 (2) (2016)
Hadi Asghari Moghaddam, Amin Farmahini Farahani, Katherine Morrow, Jung Ho Ahn, Nam Sung Kim
Near-DRAM Acceleration with Single-ISA Heterogeneous Processing in Standard Memory Modules. IEEE Micro 36 (1) (2016)
Byungchul Hong, Yongkee Kwon, Jung Ho Ahn, John Kim
Adaptive and flexible key-value stores through soft data partitioning. ICCD (2016)
Byungchul Hong, Gwangsun Kim, Jung Ho Ahn, Yongkee Kwon, Hongsik Kim, John Kim
Accelerating Linked-list Traversal Through Near-Data Processing. PACT (2016)
Bingchao Li, Choungki Song, Jizeng Wei, Jung Ho Ahn, Nam Sung Kim
Exploring new features of high-bandwidth memory for GPUs. IEICE Electron. Express 13 (14) (2016)
Amin Farmahini Farahani, Jung Ho Ahn, Katherine Morrow, Nam Sung Kim
DRAMA: An Architecture for Accelerated Processing Near Memory. IEEE Comput. Archit. Lett. 14 (1) (2015)
Young Hoon Son, Sukhan Lee, Seongil O, Sanghyuk Kwon, Nam Sung Kim, Jung Ho Ahn
CiDRA: A cache-inspired DRAM resilience architecture. HPCA (2015)
Hao Wang, Chang-Jae Park, Gyungsu Byun, Jung Ho Ahn, Nam Sung Kim
Alloy: Parallel-serial memory channel architecture for single-chip heterogeneous processor systems. HPCA (2015)
Sheng Li, Hyeontaek Lim, Victor W. Lee, Jung Ho Ahn, Anuj Kalia, Michael Kaminsky, David G. Andersen, Seongil O, Sukhan Lee, Pradeep Dubey
Architecting to achieve a billion requests per second throughput on a single key-value store server platform. ISCA (2015)
Ke Chen, Sheng Li, Jung Ho Ahn, Naveen Muralimanohar, Jishen Zhao, Cong Xu, Seongil O, Yuan Xie, Jay B. Brockman, Norman P. Jouppi
History-Assisted Adaptive-Granularity Caches (HAAG$) for High Performance 3D DRAM Architectures. ICS (2015)
Amin Farmahini Farahani, Jung Ho Ahn, Katherine Morrow, Nam Sung Kim
NDA: Near-DRAM acceleration architecture leveraging commodity DRAM devices and standard memory modules. HPCA (2015)
Seongil O, Sanghyuk Kwon, Young Hoon Son, Yujin Park, Jung Ho Ahn
CIDR: A Cache Inspired Area-Efficient DRAM Resilience Architecture against Permanent Faults. IEEE Comput. Archit. Lett. 14 (1) (2015)
Seongil O, Young Hoon Son, Nam Sung Kim, Jung Ho Ahn
Row-buffer decoupling: A case for low-latency DRAM microarchitecture. ISCA (2014)
Young Hoon Son, Seongil O, Hyunggyun Yang, Daejin Jung, Jung Ho Ahn, John Kim, Jangwoo Kim, Jae W. Lee
Microbank: Architecting Through-Silicon Interposer-Based Main Memory Systems. SC (2014)
Jinho Lee, Moo-Kyoung Chung, Yeon-Gon Cho, Soojung Ryu, Jung Ho Ahn, Kiyoung Choi
Mapping and Scheduling of Tasks and Communications on Many-Core SoC Under Local Memory Constraint. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32 (11) (2013)
Young-Geun Choi, Sungjoo Yoo, Sunggu Lee, Jung Ho Ahn, Kangmin Lee
MAEPER: Matching Access and Error Patterns With Error-Free Resource for Low Vcc L1 Cache. IEEE Trans. Very Large Scale Integr. Syst. 21 (6) (2013)
Jung Ho Ahn, Sheng Li, Seongil O, Norman P. Jouppi
McSimA+: A manycore simulator with application-level+ simulation and detailed microarchitecture modeling. ISPASS (2013)
Jung Ho Ahn, Young Hoon Son, John Kim
Scalable high-radix router microarchitecture using a network switch organization. ACM Trans. Archit. Code Optim. 10 (3) (2013)
Daniel W. Chang, Young Hoon Son, Jung Ho Ahn, Hoyoung Kim, Minwook Ahn, Michael J. Schulte, Nam Sung Kim
Dynamic bandwidth scaling for embedded DSPs with 3D-stacked DRAM and wide I/Os. ICCAD (2013)
Hyunhee Kim, Jung Ho Ahn, Jihong Kim
Exploiting Replicated Cache Blocks to Reduce L2 Cache Leakage in CMPs. IEEE Trans. Very Large Scale Integr. Syst. 21 (10) (2013)
Gwangsun Kim, John Kim, Jung Ho Ahn, Jaeha Kim
Memory-centric system interconnect design with Hybrid Memory Cubes. PACT (2013)
Young Hoon Son, Seongil O, Yuhwan Ro, Jae W. Lee, Jung Ho Ahn
Reducing memory access latency with asymmetric DRAM bank organizations. ISCA (2013)

Jung Ho Ahn.css-eqlu8i{font-size:small;padding-left:4px;}

Publication Activity (10 Years)

Top Topics

Top Venues

Jung Ho Ahn