Kiyoung Choi

ORCID

Publication Activity (10 Years)

Years Active: 1988-2024
Publications (10 Years): 54

Top Venues

ISOCC

VLSI-SoC

ASP-DAC

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Kiyoung Choi, Junho Song, Wonbum Yun, Deokjin Lee, Sehoon Oh
Identification of Flexible Joint Robot Inertia Matrix Using Frequency Response Analysis. ISIE (2024)
Deokjin Lee, Kiyoung Choi, Junyoung Kim, Wonbum Yun, Taehoon Kim, Kanghyun Nam, Sehoon Oh
ExSLeR: Development of a Robotic Arm for Human Skill Learning. AIM (2023)
Junwhan Ahn, Sungpack Hong, Sungjoo Yoo, Onur Mutlu, Kiyoung Choi
Retrospective: A Scalable Processing-in-Memory Accelerator for Parallel Graph Processing. CoRR (2023)
Deokjin Lee, Kiyoung Choi, Wonbum Yun, Sehoon Oh
Human-Robot Interaction Force based Power Assistive Algorithm of Upper Limb Exoskeleton Robots Driven by a Series Elastic Actuator. IECON (2022)
Namhyung Kim, Hanmin Park, Dongwoo Lee, Sungbum Kang, Jinho Lee, Kiyoung Choi
ComPreEND: Computation Pruning through Predictive Early Negative Detection for ReLU in a Deep Neural Network Accelerator. IEEE Trans. Computers 71 (7) (2022)
Heesu Kim, Hanmin Park, Taehyun Kim, Kwanheum Cho, Eojin Lee, Soojung Ryu, Hyuk-Jae Lee, Kiyoung Choi, Jinho Lee
GradPIM: A Practical Processing-in-DRAM Architecture for Gradient Descent. CoRR (2021)
Heesu Kim, Hanmin Park, Taehyun Kim, Kwanheum Cho, Eojin Lee, Soojung Ryu, Hyuk-Jae Lee, Kiyoung Choi, Jinho Lee
GradPIM: A Practical Processing-in-DRAM Architecture for Gradient Descent. HPCA (2021)
Heesu Kim, Jongho Kim, Hussam Amrouch, Jörg Henkel, Andreas Gerstlauer, Kiyoung Choi, Hanmin Park
Aging Compensation With Dynamic Computation Approximation. IEEE Trans. Circuits Syst. I Fundam. Theory Appl. (4) (2020)
Joonsang Yu, Sungbum Kang, Kiyoung Choi
Network Recasting: A Universal Method for Network Architecture Transformation. AAAI (2019)
Hanmin Park, Kiyoung Choi
Cell division: weight bit-width reduction technique for convolutional neural network hardware accelerators. ASP-DAC (2019)
Euntae Choi, Kyungmi Lee, Kiyoung Choi
Autoencoder-Based Incremental Class Learning without Retraining on Old Data. CoRR (2019)
Jaehyun Kim, Chaeun Lee, Jihun Kim, Yumin Kim, Cheol Seong Hwang, Kiyoung Choi
VCAM: Variation Compensation through Activation Matching for Analog Binarized Neural Networks. ISLPED (2019)
Chaeun Lee, Jaehyun Kim, Kiyoung Choi
An RRAM-based Analog Neuron Design for the Weighted Spiking Neural network. ISOCC (2019)
Jongho Kim, Heesu Kim, Hussam Amrouch, Jörg Henkel, Andreas Gerstlauer, Kiyoung Choi
Aging Gracefully with Approximation. ISCAS (2019)
Gunhee Lee, Hanmin Park, Namhyung Kim, Joonsang Yu, Sujeong Jo, Kiyoung Choi
Acceleration of DNN Backward Propagation by Selective Computation of Gradients. DAC (2019)
Jaehyun Kim, Heesu Kim, Subin Huh, Jinho Lee, Kiyoung Choi
Deep neural networks with weighted spikes. Neurocomputing 311 (2018)
Barend Harris, Mansureh S. Moghaddam, Duseok Kang, Inpyo Bae, Euiseok Kim, Hyemi Min, Hansu Cho, Sukjin Kim, Bernhard Egger, Soonhoi Ha, Kiyoung Choi
Architectures and algorithms for user customization of CNNs. ASP-DAC (2018)
Namhyung Kim, Junwhan Ahn, Kiyoung Choi, Daniel Sánchez, Donghoon Yoo, Soojung Ryu
Benzene: An Energy-Efficient Distributed Hybrid Cache Architecture for Manycore Systems. ACM Trans. Archit. Code Optim. 15 (1) (2018)
Jongho Kim, Kiyoung Choi, Yonghwan Kim, Wook Kim, Kyung Tae Do, Jung-Hwan Choi
Delay Monitoring System With Multiple Generic Monitors for Wide Voltage Range Operation. IEEE Trans. Very Large Scale Integr. Syst. 26 (1) (2018)
Sujeong Jo, Hanmin Park, Gunhee Lee, Kiyoung Choi
Training Neural Networks with Low Precision Dynamic Fixed-Point. ICCD (2018)
Aidyn Zhakatayev, Kyounghoon Kim, Kiyoung Choi, Jongeun Lee
An Efficient and Accurate Stochastic Number Generator Using Even-Distribution Coding. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37 (12) (2018)
Jaehyun Kim, Chaeun Lee, Kiyoung Choi
Energy Efficient Analog Synapse/Neuron Circuit for Binarized Neural Networks. ISOCC (2018)
Joonsang Yu, Sungbum Kang, Kiyoung Choi
Network Recasting: A Universal Method for Network Architecture Transformation. CoRR (2018)
Sungbum Kang, Joonsang Yu, Kiyoung Choi
Tapered-Ratio Compression for Residual Network. ISOCC (2018)
Dongwoo Lee, Sungbum Kang, Kiyoung Choi
ComPEND: Computation Pruning through Early Negative Detection for ReLU in a Deep Neural Network Accelerator. ICS (2018)
Heesu Kim, Euntae Choi, Kiyoung Choi
Speaker Verification based on Deep Neural Network for Text-Constrained Short Commands. APSIPA (2018)
Hossein Moradian, Sujeong Jo, Kiyoung Choi
Reconfigurable Multi-Input Adder Design for Deep Neural Network Accelerators. ISOCC (2018)
Bernhard Egger, Hochan Lee, Duseok Kang, Mansureh S. Moghaddam, Youngchul Cho, Yeonbok Lee, Sukjin Kim, Soonhoi Ha, Kiyoung Choi
A space- and energy-efficient code Compression/Decompression technique for coarse-grained reconfigurable architectures. CGO (2017)
Jinho Lee, Jongwook Chung, Jung Ho Ahn, Kiyoung Choi
Excavating the Hidden Parallelism Inside DRAM Architectures With Buffered Compares. IEEE Trans. Very Large Scale Integr. Syst. 25 (6) (2017)
Kyounghoon Kim, Kiyoung Choi
Synthesis of multi-variate stochastic computing circuits. VLSI-SoC (2017)
Hyunjik Song, Kiyoung Choi
Autonomic Diffusive Load Balancing on Many-Core Architecture Using Simulated Annealing. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (8) (2017)
Atul Rahman, Sangyun Oh, Jongeun Lee, Kiyoung Choi
Design space exploration of FPGA accelerators for convolutional neural networks. DATE (2017)
Daewoo Kim, Mansureh S. Moghaddam, Hossein Moradian, Hyeon Uk Sim, Jongeun Lee, Kiyoung Choi
FPGA implementation of convolutional neural network based on stochastic computing. FPT (2017)
Hyeon Uk Sim, Dong Nguyen, Jongeun Lee, Kiyoung Choi
Scalable stochastic-computing accelerator for convolutional neural networks. ASP-DAC (2017)
Mansureh Shahraki Moghaddam, M. Balakrishnan, Kiyoung Choi
Optimal mapping of program overlays onto many-core platforms with limited memory capacity. Des. Autom. Embed. Syst. 21 (3-4) (2017)
Joonsang Yu, Kyounghoon Kim, Jongeun Lee, Kiyoung Choi
Accurate and Efficient Stochastic Computing Hardware for Convolutional Neural Networks. ICCD (2017)
Heesu Kim, Joonsang Yu, Kiyoung Choi
Hybrid spiking-stochastic Deep Neural Network. VLSI-DAT (2017)
Jinho Lee, Heesu Kim, Sungjoo Yoo, Kiyoung Choi, H. Peter Hofstee, Gi-Joon Nam, Mark Nutter, Damir A. Jamsek
ExtraV: Boosting Graph Processing Near Storage with a Coherent Accelerator. Proc. VLDB Endow. 10 (12) (2017)
Mansureh S. Moghaddam, Barend Harris, Duseok Kang, Inpyo Bae, Euiseok Kim, Hyemi Min, Hansu Cho, Sukjin Kim, Bernhard Egger, Soonhoi Ha, Kiyoung Choi
Incremental training of CNNs for user customization: work-in-progress. CASES (2017)
Dongwoo Lee, Sang-Heon Lee, Soojung Ryu, Kiyoung Choi
Dirty-Block Tracking in a Direct-Mapped DRAM Cache with Self-Balancing Dispatch. ACM Trans. Archit. Code Optim. 14 (2) (2017)
Subin Huh, Joonsang Yu, Kiyoung Choi
A new stochastic mutiplier for deep neural networks. ISOCC (2017)
Junwhan Ahn, Sungjoo Yoo, Kiyoung Choi
AIM: Energy-Efficient Aggregation Inside the Memory Hierarchy. ACM Trans. Archit. Code Optim. 13 (4) (2016)
Jaehyun Kim, Kiyoung Choi, Sang-Heon Lee, Soojung Ryu
Dynamic clock synchronization scheme between voltage domains in multi-core architecture. VLSI-SoC (2016)
Junwhan Ahn, Sungjoo Yoo, Kiyoung Choi
Prediction Hybrid Cache: An Energy-Efficient STT-RAM Cache Architecture. IEEE Trans. Computers 65 (3) (2016)
Jinho Lee, Jung Ho Ahn, Kiyoung Choi
Buffered compares: Excavating the hidden parallelism inside DRAM architectures with lightweight logic. DATE (2016)
Kyounghoon Kim, Helin Lin, Jin Young Choi, Kiyoung Choi
A design framework for hierarchical ensemble of multiple feature extractors and multiple classifiers. Pattern Recognit. 52 (2016)
Hanmin Park, Kiyoung Choi
Adaptively weighted round-robin arbitration for equality of service in a many-core network-on-chip. IET Comput. Digit. Tech. 10 (1) (2016)
Jongho Kim, Gunhee Lee, Kiyoung Choi, Yonghwan Kim, Wook Kim, Kyung Tae Do, Jung Yun Choi
Adaptive delay monitoring for wide voltage-range operation. DATE (2016)
Atul Rahman, Jongeun Lee, Kiyoung Choi
Efficient FPGA acceleration of Convolutional Neural Networks using logical-3D compute array. DATE (2016)
Jungwoo Seo, Joonsang Yu, Jongeun Lee, Kiyoung Choi
A new approach to binarizing neural networks. ISOCC (2016)
Namhyung Kim, Kiyoung Choi
Exploration of trade-offs in the design of volatile STT-RAM cache. J. Syst. Archit. 71 (2016)
Kyounghoon Kim, Jongeun Lee, Kiyoung Choi
An energy-efficient random number generator for stochastic circuits. ASP-DAC (2016)
Junwhan Ahn, Sungjoo Yoo, Kiyoung Choi
Low-Power Hybrid Memory Cubes With Link Power Management and Two-Level Prefetching. IEEE Trans. Very Large Scale Integr. Syst. 24 (2) (2016)
Kyounghoon Kim, Jungki Kim, Joonsang Yu, Jungwoo Seo, Jongeun Lee, Kiyoung Choi
Dynamic energy-accuracy trade-off using stochastic computing in deep neural networks. DAC (2016)
Naehyuck Chang, Kiyoung Choi
Message from the general chairs. VLSI-SoC (2015)
Pierre Nicolas-Nicolaz, Kiyoung Choi
Dynamic error tracking and supply voltage adjustment for low power. VLSI-SoC (2015)
Jinho Lee, Kyungsu Kang, Kiyoung Choi
REDELF: An Energy-Efficient Deadlock-Free Routing for 3D NoCs with Partial Vertical Connections. ACM J. Emerg. Technol. Comput. Syst. 12 (3) (2015)
Namhyung Kim, Junwhan Ahn, Woong Seo, Kiyoung Choi
Energy-efficient exclusive last-level hybrid caches consisting of SRAM and STT-RAM. VLSI-SoC (2015)
Yiran Chen, Kiyoung Choi, Weisheng Zhao
Guest Editorial for Special Issue on Emerging Memory Technologies - Modeling, Design, and Applications for Multi-Scale Computing. IEEE Trans. Multi Scale Comput. Syst. 1 (3) (2015)
Junwhan Ahn, Sungjoo Yoo, Onur Mutlu, Kiyoung Choi
PIM-enabled instructions: a low-overhead, locality-aware processing-in-memory architecture. ISCA (2015)
Junwhan Ahn, Sungpack Hong, Sungjoo Yoo, Onur Mutlu, Kiyoung Choi
A scalable processing-in-memory accelerator for parallel graph processing. ISCA (2015)
Jinho Lee, Junwhan Ahn, Kiyoung Choi, Kyungsu Kang
THOR: Orchestrated thermal management of cores and networks in 3D many-core architectures. ASP-DAC (2015)
Jae Min Cho, Kiyoung Choi
An FPGA implementation of high-throughput key-value store using Bloom filter. VLSI-DAT (2014)
Helin Lin, Kyounghoon Kim, Kiyoung Choi
Concept-aware ensemble system for pedestrian detection. Intelligent Vehicles Symposium (2014)
Jihyun Ryoo, Kyuseung Han, Kiyoung Choi
Leveraging parallelism in the presence of control flow on CGRAs. ASP-DAC (2014)
Junwhan Ahn, Sungjoo Yoo, Kiyoung Choi
DASCA: Dead Write Prediction Assisted STT-RAM Cache Architecture. HPCA (2014)
Dongwoo Lee, Kiyoung Choi
Energy-efficient partitioning of hybrid caches in multi-core architecture. VLSI-SoC (2014)
Jason Helge Anderson, Kiyoung Choi
International Conference on Field-Programmable Technology (FPT'12). ACM Trans. Reconfigurable Technol. Syst. 7 (3) (2014)
Junwhan Ahn, Sungjoo Yoo, Kiyoung Choi
Dynamic Power Management of Off-Chip Links for Hybrid Memory Cubes. DAC (2014)
Manhwee Jo, Dongwook Lee, Kyuseung Han, Kiyoung Choi
Design of a coarse-grained reconfigurable architecture with floating-point support and comparative study. Integr. 47 (2) (2014)
Seokhyun Lee, Kiyoung Choi
Critical-path-aware high-level synthesis with distributed controller for fast timing closure. ACM Trans. Design Autom. Electr. Syst. 19 (2) (2014)
Jongeun Lee, Seongseok Seo, Jong Kyung Paek, Kiyoung Choi
Configurable range memory for effective data reuse on programmable accelerators. ACM Trans. Design Autom. Electr. Syst. 19 (2) (2014)
Kyuseung Han, Ganghee Lee, Kiyoung Choi
Software-Level Approaches for Tolerating Transient Faults in a Coarse-GrainedReconfigurable Architecture. IEEE Trans. Dependable Secur. Comput. 11 (4) (2014)
Junwhan Ahn, Kiyoung Choi
LASIC: Loop-Aware Sleepy Instruction Caches Based on STT-RAM Technology. IEEE Trans. Very Large Scale Integr. Syst. 22 (5) (2014)
Sungju Han, Jinho Lee, Kiyoung Choi
Tree-Mesh Heterogeneous Topology for Low-Latency NoC. NoCArc@MICRO (2014)
Dongwoo Lee, Kiyoung Choi
Energy-Efficient Partitioning of Hybrid Caches in Multi-core Architecture. VLSI-SoC (Selected Papers) (2014)
Junwhan Ahn, Sungjoo Yoo, Kiyoung Choi
Write intensity prediction for energy-efficient non-volatile caches. ISLPED (2013)
Jinho Lee, Moo-Kyoung Chung, Yeon-Gon Cho, Soojung Ryu, Jung Ho Ahn, Kiyoung Choi
Mapping and Scheduling of Tasks and Communications on Many-Core SoC Under Local Memory Constraint. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32 (11) (2013)
Gunhee Lee, Jinho Lee, Kiyoung Choi
Towards optimal adaptive routing in 3D NoC with limited vertical bandwidth. NoCArc@MICRO (2013)
Jinho Lee, Kiyoung Choi
A deadlock-free routing algorithm requiring no virtual channel on 3D-NoCs with partial vertical connections. NOCS (2013)
Kyuseung Han, Kiyoung Choi, Jongeun Lee
Compiling control-intensive loops for CGRAs with state-based full predication. DATE (2013)
Kyuseung Han, Junwhan Ahn, Kiyoung Choi
Power-Efficient Predication Techniques for Acceleration of Control Flow Execution on CGRA. ACM Trans. Archit. Code Optim. 10 (2) (2013)
Jinho Lee, Dongwook Lee, Sunwook Kim, Kiyoung Choi
Deflection routing in 3D Network-on-Chip with TSV serialization. ASP-DAC (2013)
Jinho Lee, Dongwook Lee, Sunwook Kim, Kiyoung Choi
Deflection routing in 3D network-on-chip with limited vertical bandwidth. ACM Trans. Design Autom. Electr. Syst. 18 (4) (2013)
Manhwee Jo, Kyuseung Han, Kiyoung Choi
Enhancing Utilization of Integer Functional Units for High-Throughput Floating Point Operations on Coarse-Grained Reconfigurable Architecture. MUE (2013)
Junwhan Ahn, Kiyoung Choi
Isomorphism-Aware Identification of Custom Instructions With I/O Serialization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32 (1) (2013)
Junwhan Ahn, Sungjoo Yoo, Kiyoung Choi
Selectively protecting error-correcting code for area-efficient and reliable STT-RAM caches. ASP-DAC (2013)
Kiyoung Choi, Sungup Jo, Hwamin Lee, Changsung Jeong
CPU-based speed acceleration techniques for shear warp volume rendering. Multim. Tools Appl. 64 (2) (2013)
Hanmin Park, Kiyoung Choi
Position-based weighted round-robin arbitration for equality of service in many-core network-on-chips. NoCArc@MICRO (2012)
Kyuseung Han, Seongsik Park, Kiyoung Choi
State-based full predication for low power coarse-grained reconfigurable architecture. DATE (2012)
Deming Chen, Kiyoung Choi, Philippe Coussy, Yuan Xie, Zhiru Zhang
ESL Design Methodology. J. Electr. Comput. Eng. 2012 (2012)
Junwhan Ahn, Kiyoung Choi
Lower-bits cache for low power STT-RAM caches. ISCAS (2012)
Jun-hee Yoo, Sungjoo Yoo, Kiyoung Choi
Active Memory Processor for Network-on-Chip-Based Architecture. IEEE Trans. Computers 61 (5) (2012)
Mingyang Zhu, Jinho Lee, Kiyoung Choi
An adaptive routing algorithm for 3D mesh NoC with limited vertical bandwidth. VLSI-SoC (2012)
Kiyoung Choi, John Kim, Gabriel H. Loh
Guest Editorial New Interconnect Technologies in On-Chip Communication. IEEE J. Emerg. Sel. Topics Circuits Syst. 2 (2) (2012)
Jinho Lee, Kiyoung Choi
Memory-aware mapping and scheduling of tasks and communications on many-core SoC. ASP-DAC (2012)
Dongwoo Lee, Junwhan Ahn, Kiyoung Choi
A Memetic Quantum-Inspired Evolutionary Algorithm for circuit bipartitioning problem. ISOCC (2012)
John Kim, Kiyoung Choi, Gabriel H. Loh
Exploiting New Interconnect Technologies in On-Chip Communication. IEEE J. Emerg. Sel. Topics Circuits Syst. 2 (2) (2012)
Di Wu, Junwhan Ahn, Imyong Lee, Kiyoung Choi
Resource-shared custom instruction generation under performance/area constraints. ISSoC (2012)
Seokhyun Lee, Kiyoung Choi
High-level synthesis with distributed controller for fast timing closure. ICCAD (2011)

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Publication Activity (10 Years)

Top Topics

Top Venues

Kiyoung Choi