Energy-efficient partitioning of hybrid caches in multi-core architecture.

Dongwoo Lee Kiyoung Choi

Published in: VLSI-SoC (2014)

Keyphrases

multi core architecture
energy efficient
wireless sensor networks
energy consumption
sensor networks
energy efficiency
digital signal processor
base station
routing protocol
multi core processors
routing algorithm
data streams
sensor nodes
power consumption
computer networks
associative memory