Christopher Batten

ORCID

Publication Activity (10 Years)

Years Active: 2004-2024
Publications (10 Years): 35

Top Venues

Massachusetts Institute of Technology, Cambridge, MA, USA (PHD)

Education History

Massachusetts Institute of Technology, Cambridge, MA, USA

PHD

Publications

Courtney Golden, Dan Ilan, Caroline Huang, Niansong Zhang, Zhiru Zhang, Christopher Batten
Supporting a Virtual Vector Instruction Set on a Commercial Compute-in-SRAM Accelerator. IEEE Comput. Archit. Lett. 23 (1) (2024)
Dai Cheol Jung, Max Ruttenberg, Paul Gao, Scott Davidson, Daniel Petrisko, Kangli Li, Aditya K. Kamath, Lin Cheng, Shaolin Xie, Peitian Pan, Zhongyuan Zhao, Zichao Yue, Bandhav Veluri, Sripathi Muralitharan, Adrian Sampson, Andrew Lumsdaine, Zhiru Zhang, Christopher Batten, Mark Oskin, Dustin Richmond, Michael Bedford Taylor
Scalable, Programmable and Dense: The HammerBlade Open-Source RISC-V Manycore. ISCA (2024)
Courtney Golden, Dan Ilan, Nicholas Cebry, Christopher Batten
Accelerating Seed Location Filtering in DNA Read Mapping Using a Commercial Compute-in-SRAM Architecture. CoRR (2024)
Khalid Al-Hawaj, Tuan Ta, Nick Cebry, Shady Agwa, Olalekan Afuye, Eric Hall, Courtney Golden, Alyssa B. Apsel, Christopher Batten
EVE: Ephemeral Vector Engines. HPCA (2023)
Christopher Batten, Jae W. Lee
Special Issue on Top Picks From the 2022 Computer Architecture Conferences. IEEE Micro 43 (4) (2023)
Ting-Jung Chang, Ang Li, Fei Gao, Tuan Ta, Georgios Tziantzioulis, Yanghui Ou, Moyang Wang, Jinzheng Tu, Kaifeng Xu, Paul J. Jackson, August Ning, Grigory Chirkov, Marcelo Orenes-Vera, Shady Agwa, Xiaoyu Yan, Eric Tang, Jonathan Balkind, Christopher Batten, David Wentzlaff
1.92 MOPS/LUT, Fully Synthesizable, CacheCoherent, Embedded FPGA. CICC (2023)
Matthew Guthaus, Christopher Batten, Erik Brunvand, Pierre-Emmanuel Gaillardon, David Harris, Rajit Manohar, Pinaki Mazumder, Larry T. Pileggi, James E. Stine
NSF Integrated Circuit Research, Education and Workforce Development Workshop Final Report. CoRR (2023)
Lin Cheng, Max Ruttenberg, Dai Cheol Jung, Dustin Richmond, Michael B. Taylor, Mark Oskin, Christopher Batten
Beyond Static Parallel Loops: Supporting Dynamic Task Parallelism on Manycore Architectures with Software-Managed Scratchpad Memories. ASPLOS (3) (2023)
Peitian Pan, Christopher Batten
Formal Verification of the Stall Invariant Property for Latency-Insensitive RTL Modules. MEMOCODE (2023)
Peitian Pan, Shunning Jiang, Yanghui Ou, Christopher Batten
Symbolic Elaboration: Checking Generator Properties in Dynamic Hardware Description Languages. MEMOCODE (2023)
Tuan Ta, Khalid Al-Hawaj, Nick Cebry, Yanghui Ou, Eric Hall, Courtney Golden, Christopher Batten
big.VLITTLE: On-Demand Data-Parallel Acceleration for Mobile Systems on Chip. MICRO (2022)
Lin Cheng, Peitian Pan, Zhongyuan Zhao, Krithik Ranjan, Jack Weber, Bandhav Veluri, Seyed Borna Ehsani, Max Ruttenberg, Dai Cheol Jung, Preslav Ivanov, Dustin Richmond, Michael B. Taylor, Zhiru Zhang, Christopher Batten
A Tensor Processing Framework for CPU-Manycore Heterogeneous Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (6) (2022)
Christopher Torng, Peitian Pan, Yanghui Ou, Cheng Tan, Christopher Batten
Ultra-Elastic CGRAs for Irregular Loop Specialization. HPCA (2021)
Shunning Jiang, Yanghui Ou, Peitian Pan, Kaishuo Cheng, Yixiao Zhang, Christopher Batten
PyH2: Using PyMTL3 to Create Productive and Open-Source Hardware Testing Methodologies. IEEE Des. Test 38 (2) (2021)
Helena Caminal, Kailin Yang, Srivatsa Srinivasa, Akshay Krishna Ramanathan, Khalid Al-Hawaj, Tianshu Wu, Vijaykrishnan Narayanan, Christopher Batten, José F. Martínez
CAPE: A Content-Addressable Processing Engine. HPCA (2021)
Shunning Jiang, Yanghui Ou, Peitian Pan, Christopher Batten
UMOC: Unified Modular Ordering Constraints to Unify Cycle- and Register-Transfer-Level Modeling. DAC (2021)
Olalekan Afuye, Shady Agwa, Christopher Batten, Alyssa B. Apsel
Layout-Based Evaluation of Read/Write Performance of SOT-MRAM and SOTFET-RAM. ESSDERC (2021)
Moyang Wang, Tuan Ta, Lin Cheng, Christopher Batten
Efficiently Supporting Dynamic Task Parallelism on Heterogeneous Cache-Coherent Systems. ISCA (2020)
Yanghui Ou, Shady Agwa, Christopher Batten
Implementing Low-Diameter On-Chip Networks for Manycore Processors Using a Tiled Physical Design Methodology. NOCS (2020)
Lin Cheng, Berkin Ilbeyi, Carl Friedrich Bolz-Tereick, Christopher Batten
Type freezing: exploiting attribute type monomorphism in tracing JIT compilers. CGO (2020)
Shunning Jiang, Peitian Pan, Yanghui Ou, Christopher Batten
PyMTL3: A Python Framework for Open-Source Hardware Modeling, Generation, Simulation, and Verification. IEEE Micro 40 (4) (2020)
Khalid Al-Hawaj, Olalekan Afuye, Shady Agwa, Alyssa B. Apsel, Christopher Batten
Towards a Reconfigurable Bit-Serial/Bit-Parallel Vector Accelerator using In-Situ Processing-In-SRAM. ISCAS (2020)
Austin Rovinski, Chun Zhao, Khalid Al-Hawaj, Paul Gao, Shaolin Xie, Christopher Torng, Scott Davidson, Aporva Amarnath, Luis Vega, Bandhav Veluri, Anuj Rao, Tutu Ajayi, Julian Puscar, Steve Dai, Ritchie Zhao, Dustin Richmond, Zhiru Zhang, Ian Galton, Christopher Batten, Michael B. Taylor, Ronald G. Dreslinski
A 1.4 GHz 695 Giga Risc-V Inst/s 496-Core Manycore Processor With Mesh On-Chip Network and an All-Digital Synthesized PLL in 16nm CMOS. VLSI Circuits (2019)
Cheng Tan, Yanghui Ou, Shunning Jiang, Peitian Pan, Christopher Torng, Shady Agwa, Christopher Batten
PyOCN: A Unified Framework for Modeling, Testing, and Evaluating On-Chip Networks. ICCD (2019)
Ivan Bukreyev, Christopher Torng, Waclaw Godycki, Christopher Batten, Alyssa B. Apsel
Four Monolithically Integrated Switched-Capacitor DC-DC Converters With Dynamic Capacitance Sharing in 65-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. (6) (2018)
Scott Davidson, Shaolin Xie, Christopher Torng, Khalid Al-Hawaj, Austin Rovinski, Tutu Ajayi, Luis Vega, Chun Zhao, Ritchie Zhao, Steve Dai, Aporva Amarnath, Bandhav Veluri, Paul Gao, Anuj Rao, Gai Liu, Rajesh K. Gupta, Zhiru Zhang, Ronald G. Dreslinski, Christopher Batten, Michael B. Taylor
The Celerity Open-Source 511-Core RISC-V Tiered Accelerator Fabric: Fast Architectures and Design Methodologies for Fast Chips. IEEE Micro 38 (2) (2018)
Tao Chen, Shreesha Srinath, Christopher Batten, G. Edward Suh
An Architectural Framework for Accelerating Dynamic Parallel Algorithms on Reconfigurable Hardware. MICRO (2018)
Shunning Jiang, Berkin Ilbeyi, Christopher Batten
Mamba: closing the performance gap in productive hardware development frameworks. DAC (2018)
Steve Dai, Ritchie Zhao, Gai Liu, Shreesha Srinath, Udit Gupta, Christopher Batten, Zhiru Zhang
Dynamic Hazard Resolution for Pipelining Irregular Loops in High-Level Synthesis. FPGA (2017)
Ji Kim, Shunning Jiang, Christopher Torng, Moyang Wang, Shreesha Srinath, Berkin Ilbeyi, Khalid Al-Hawaj, Christopher Batten
Using intra-core loop-task accelerators to improve the productivity and performance of task-based parallel programs. MICRO (2017)
Berkin Ilbeyi, Carl Friedrich Bolz-Tereick, Christopher Batten
Cross-layer workload characterization of meta-tracing JIT VMs. IISWC (2017)
Berkin Ilbeyi, Christopher Batten
JIT-assisted fast-forward embedding and instrumentation to enable fast, accurate, and agile simulation. ISPASS (2016)
Ritchie Zhao, Gai Liu, Shreesha Srinath, Christopher Batten, Zhiru Zhang
Improving high-level synthesis with decoupled data structure optimization. DAC (2016)
Christopher Torng, Moyang Wang, Christopher Batten
Asymmetry-Aware Work-Stealing Runtimes. ISCA (2016)
Christopher Torng, Moyang Wang, Bharath Sudheendra, Nagaraj Murali, Suren Jayasuriya, Shreesha Srinath, Taylor Pritchard, Robin Ying, Christopher Batten
Experiences using a novel Python-based hardware modeling framework for computer architecture test chips. Hot Chips Symposium (2016)
Derek Lockhart, Berkin Ilbeyi, Christopher Batten
Pydgin: generating fast instruction set simulators from simple architecture descriptions with meta-tracing JIT compilers. ISPASS (2015)
Waclaw Godycki, Christopher Torng, Ivan Bukreyev, Alyssa B. Apsel, Christopher Batten
Enabling Realistic Fine-Grain Voltage Scaling with Reconfigurable Power Distribution Networks. MICRO (2014)
Shreesha Srinath, Berkin Ilbeyi, Mingxing Tan, Gai Liu, Zhiru Zhang, Christopher Batten
Architectural Specialization for Inter-Iteration Loop Dependence Patterns. MICRO (2014)
Ji Yun Kim, Christopher Batten
Accelerating Irregular Algorithms on GPGPUs Using Fine-Grain Hardware Worklists. MICRO (2014)
Derek Lockhart, Gary Zibrat, Christopher Batten
PyMTL: A Unified Framework for Vertically Integrated Computer Architecture Research. MICRO (2014)
Yunsup Lee, Rimas Avizienis, Alex Bishara, Richard Xia, Derek Lockhart, Christopher Batten, Krste Asanovic
Exploring the Tradeoffs between Programmability and Efficiency in Data-Parallel Accelerators. ACM Trans. Comput. Syst. 31 (3) (2013)
Ji Kim, Christopher Torng, Shreesha Srinath, Derek Lockhart, Christopher Batten
Microarchitectural mechanisms to exploit value structure in SIMT architectures. ISCA (2013)
Christopher Batten, Ajay Joshi, Vladimir Stojanovic, Krste Asanovic
Designing Chip-Level Nanophotonic Interconnection Networks. IEEE J. Emerg. Sel. Topics Circuits Syst. 2 (2) (2012)
Yunsup Lee, Rimas Avizienis, Alex Bishara, Richard Xia, Derek Lockhart, Christopher Batten, Krste Asanovic
The Maven vector-thread architecture. Hot Chips Symposium (2011)
Nithin Michael, Milen Nikolov, Ao Tang, G. Edward Suh, Christopher Batten
Analysis of application-aware on-chip routing under traffic uncertainty. NOCS (2011)
Yunsup Lee, Rimas Avizienis, Alex Bishara, Richard Xia, Derek Lockhart, Christopher Batten, Krste Asanovic
Exploring the tradeoffs between programmability and efficiency in data-parallel accelerators. ISCA (2011)
Scott Beamer, Chen Sun, Yong-Jin Kwon, Ajay Joshi, Christopher Batten, Vladimir Stojanovic, Krste Asanovic
Re-architecting DRAM memory systems with monolithically integrated silicon photonics. ISCA (2010)
Ajay Joshi, Christopher Batten, Yong-Jin Kwon, Scott Beamer, Imran Shamim, Krste Asanovic, Vladimir Stojanovic
Silicon-photonic clos networks for global on-chip communication. NOCS (2009)
Scott Beamer, Krste Asanovic, Christopher Batten, Ajay Joshi, Vladimir Stojanovic
Designing multi-socket systems using silicon photonics. ICS (2009)
Christopher Batten, Ajay Joshi, Jason Orcutt, Anatol Khilo, Benjamin Moss, Charles Holzwarth, Milos A. Popovic, Hanqing Li, Henry I. Smith, Judy L. Hoyt, Franz X. Kärtner, Rajeev J. Ram, Vladimir Stojanovic, Krste Asanovic
Building Many-Core Processor-to-DRAM Networks with Monolithic CMOS Silicon Photonics. IEEE Micro 29 (4) (2009)
Christopher Batten, Ajay Joshi, Jason Orcutt, Anatoly Khilo, Benjamin Moss, Charles Holzwarth, Milos A. Popovic, Hanqing Li, Henry I. Smith, Judy L. Hoyt, Franz X. Kärtner, Rajeev J. Ram, Vladimir Stojanovic, Krste Asanovic
Building Manycore Processor-to-DRAM Networks with Monolithic Silicon Photonics. Hot Interconnects (2008)
Ronny Krashinsky, Christopher Batten, Krste Asanovic
Implementing the scale vector-thread processor. ACM Trans. Design Autom. Electr. Syst. 13 (3) (2008)
Ronny Krashinsky, Christopher Batten, Mark Hampton, Steve Gerding, Brian Pharris, Jared Casper, Krste Asanovic
The Vector-Thread Architecture. IEEE Micro 24 (6) (2004)
Ronny Krashinsky, Christopher Batten, Mark Hampton, Steve Gerding, Brian Pharris, Jared Casper, Krste Asanovic
The Vector-Thread Architecture. ISCA (2004)
Christopher Batten, Ronny Krashinsky, Steve Gerding, Krste Asanovic
Cache Refill/Access Decoupling for Vector Machines. MICRO (2004)

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Publication Activity (10 Years)

Top Topics

Top Venues

Christopher Batten